Pw1306; Pinout - Hitachi 15LD2200 Service Manual

15” tft tv
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SYMBOL
P1.3/T1
P1.6/SCL
P1.7/SDA
VDDP(3.3V)
P2.0/TPWM
P2.1/PWM0
P2.2/PWM1
P2.3/PWM2
P3.0/ADC0
P3.1/ADC1
VDDC1
DECV1V8
P3.2/ADC2
P3.3/ADC3
VSSC/P
P2.4/PWM3
P2.5/PWM4
VDDC3
VSSC3
P1.2/INT2
P1.4/RX
P1.5/TX

3.3. PW1306

The PW1306 Video Image Processor is a "system-on-a-chip " that oversamples and processes RGB or YPbPr video from
analog video decoders. The PW1306 integrates video processing, including deinterlacer and video enhancement filters with a
triple ADC. Analog RGB or YPbPr in PC graphics, standard, or high-definition video can be displayed in either 4:3 or 16:9
formats.
Supports analog video decoders with triple 8-bit Analog-to-Digital Converters (ADCs) up to 140 MSPS conversion rate
Supports Sync-on-Green (SOG), Sync-on-Luma (SOY),and Composite sync inputs
1080i/720p/480p HDTV; 480i and 576i NTSC/PAL SDTV; PC graphics (up to SXGA)
YPbPr/YCbCr/YUV-to-RGB Color Space Converter with programmable coefficients
On-chip, bitmap-based, OSD controller with on-chip memory
24/30/48-bit RGB output with 135 MPixels/second maximum output rate
3.3.1.

Pinout

This section lists the pin functions for the PW1306 208-pin PQFP package. Pin types include:
I/O SR5 (I/O slew rate-controlled,5V input tolerant)
I/O D5 (bidirectional, 5-volt tolerant with pull-down)
I/O U5 (bidirectional, 5-volt tolerant with pull-up)
ID 5 (input, 5-volt tolerant with pull-down)
15" TFT TV Service Manual
AV STEREO
STEREO +AV
NO AUDIO
STEREO
DSP
107
107
108
108
109
109
110
110
111
111
112
112
113
113
114
114
115
115
116
116
117
117
118
118
119
119
120
120
121
121
122
122
123
123
124
124
125
125
126
126
127
127
128
128
MONO
DESCRIPTION
107
port 1.3 or Counter/Timer 1 input
port 1.6 or I
C-bus clock line
2
108
port 1.7 or I
C-bus data line
2
109
supply to periphery and on-chip voltage regulator
110
(3.3 V)
111
port 2.0 or Tuning PWM output
112
port 2.1 or PWM0 output
113
port 2.2 or PWM1 output
114
port 2.3 or PWM2 output
115
port 3.0 or ADC0 input
116
port 3.1 or ADC1 input
117
digital supply to core (+1.8 V)
118
decoupling 1.8 V supply
119
port 3.2 or ADC2 input
120
port 3.3 or ADC3 input
121
digital ground for m-Controller core and periphery
122
port 2.4 or PWM3 output
123
port 2.5 or PWM4 output
124
digital supply to core (1.8V)
125
ground
126
port 1.2 or external interrupt 2
127
port 1.4 or UART bus
128
port 1.5 or UART bus
15

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