Compaq EN Series Technical Reference Manual page 70

Net pc and small form factor models
Hide thumbs Also See for EN Series:
Table of Contents

Advertisement

Chapter 4 System Support
4.4.4.2 Non-Maskable Interrupts
Non-maskable interrupts cannot be masked (inhibited) within the microprocessor itself but may
be maskable by software using logic external to the microprocessor. There are two non-maskable
interrupt signals: the NMI- and the SMI-. These signals have service priority over all maskable
interrupts, with the SMI- having top priority over all interrupts including the NMI-.
NMI- Generation
The Non-Maskable Interrupt (NMI-) signal can be generated by one of the following actions:
♦ Parity errors detected on the ISA bus (activating IOCHK-).
♦ Parity errors detected on a PCI bus (activating SERR- or PERR-).
♦ Microprocessor internal error (activating IERRA or IERRB)
The IOCHK-, SERR-, and PERR- signals are routed through the south bridge component, which
in turn activates the NMI to the microprocessor.
The NMI Status Register at I/O port 061h contains NMI source and status data as follows:
NMI Status Register 61h
Bit
Function
7
NMI Status:
0 = No NMI from system board parity error.
1 = NMI requested, read only
6
IOCHK- NMI:
0 = No NMI from IOCHK-
1 = IOCHK- is active (low), NMI requested, read only
5
Interval Timer 1, Counter 2 (Speaker) Status
4
Refresh Indicator (toggles with every refresh)
3
IOCHK- NMI Enable/Disable:
0 = NMI from IOCHK- enabled
1 = NMI from IOCHK- disabled and cleared (R/W)
2
System Board Parity Error (PERR/SERR) NMI Enable:
0 = Parity error NMI enabled
1 = Parity error NMI disabled and cleared (R/W)
1
Speaker Data (R/W)
0
Inteval Timer 1, Counter 2 Gate Signal (R/W)
0 = Counter 2 disabled
1 = Counter 2 enabled
Functions not related to NMI activity.
After the active NMI has been processed, status bits <7> or <6> are cleared by pulsing bits <2>
or <3> respectively.
The NMI Enable Register (070h, <7>) is used to enable/disable the NMI signal. Writing 80h to
this register masks generation of the NMI-. Note that the lower six bits of register at I/O port 70h
affect RTC operation and should be considered when changing NMI- generation status.
4-24
Compaq Deskpro EN Series of Personal Computers
NetPC and Small Form Factor Models
First Edition - June 1998

Advertisement

Table of Contents
loading

This manual is also suitable for:

Deskpro en series

Table of Contents