The Ibm Power7 Processor - IBM BladeCenter PS703 Technical Overview And Introduction

PS704
base
DIMM
planar
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
PS704
DIMM
SMP
DIMM
planar
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
Figure 2-2 PS704 block diagram

2.2 The IBM POWER7 processor

The IBM POWER7 processor represents a leap forward in technology achievement and
associated computing capability. The multi-core architecture of the POWER7 processor has
been matched with a wide range of related technologies to deliver leading throughput,
efficiency, scalability, and reliability, availability, and serviceability (RAS).
Although the processor is an important component in servers, many elements and facilities
have to be balanced across a server to deliver maximum throughput. As with previous
generations of systems based on POWER processors, the design philosophy for POWER7
SMI
SMI
POWER7
Processor 1
SMI
SMI
Each
4 bytes
SMI
SMI
POWER7
Processor 0
SMI
SMI
8 bytes
SMI
SMI
POWER7
Processor 0
SMI
SMI
Each
4 bytes
SMI
SMI
POWER7
Processor 1
SMI
SMI
To FSP on SMP planar
Flash
NVRAM
FSP
DDR
TPMD
BCM5709
Gigabit
Ethernet
P7IOC
I/O hub
4 bytes
SAS SAS
4 bytes
P7IOC
I/O hub
BCM5709
Gigabit
Ethernet
To FSP
GPIO
on base
planar
Chapter 2. Architecture and technical overview
BCM5387
To chassis
Ethernet
I/O bays
switch
1 & 2
To
PCIe
media
USB
to PCI
tray
CFFh I/O connector
CIOv I/O connector CIOv I/O connector
HDD/SSD connector
HDD/SSD connector
CIOv I/O connector
CFFh I/O connector
To chassis
I/O bays
1 & 2
39