Receiver Back End; Frequency Synthesizer - Motorola GM300 Service Manual

Theory of Operation
RF Board
Range 403-433 438-470
1 dB BW: 35 MHz 45 MHz
3 dB BW: 44 MHz 60 MHz
Loss: 4.2 dB
f : 418 MHz 455 MHz
CENTER
Image Rej: 55 dB
At f : 343 MHz 380 MHz
IMAGE
Again, image attenuation increases for frequencies
lower than f .
IMAGE
A pin diode attenuator is located between the 4 pole Þl-
ter and the Þrst mixer. In the Distance mode, Q5 and Q6
are turned on, CR5 is forward-biased which bypasses
R12, and no loss is introduced. In the Local mode, Q5,
Q6 and CR5 are off, inserting 10 dB of attenuation due
to R12. Because the attenuator is located after the RF
ampliÞer, receiver sensitivity is reduced only by 5 dB,
while the overall third order input intercept is raised
by 15 dB. Thus, the Local mode signiÞcantly reduces
the susceptibility to IM-related interference.
The Þrst mixer is a passive, double-balanced type con-
sisting of T1, T2 and U1. This mixer provides all of the
necessary rejection of the half-IF spurious response,
since the improvement due to Þlter selectivity is negli-
gible at 470 MHz. Low-side injection is delivered to the
Þrst mixer from the second RX buffer in the synthesizer
circuit. The injection level is +11.6 dBm for 403-433
range, +5 dBm for the 438-470 MHz range, and
+6.5 dBm for the 465-495 and 490-520 MHz ranges.
The mixer output is connected to a diplexer network
which matches its output to the Þrst IF ampliÞer Q51 at
the IF frequency of 45.1 MHz, and terminates it in a
50 ohm resistor, R51, at all other frequencies.

Receiver Back End

Q51 ampliÞes the IF signal by approximately 17 dB.
The output of Q51 is Þltered by a four pole crystal Þlter
(comprised of two matched units Y51A and Y51B). The
3 dB bandwidth of the crystal Þlter is 14 kHz for 20/
25 kHz channel spacing models, and 8 kHz for
12.5 kHz channel spacing models. The signal is ampli-
Þed 18 dB by the second IF ampliÞer Q52, and applied
to the input of the receiver system IC U51-19 (see
Figure 2-1).
The 45.1 MHz Þrst IF signal is applied to the second
mixer section of U51. A 44.645 MHz crystal oscillator
provides the low side injection signal, which is also
applied to U51-19. The output of the second mixer is a
455 kHz second IF signal which is Þltered by ceramic
Þlter FL51, ampliÞed, Þltered by ceramic Þlter FL52,
and applied to the audio detector. As with the crystal
Þlter, the bandwidth of the ceramic Þlters are narrower
for 12.5 kHz channel spacing models than for 20/
25 kHz. The IF test point is located at the output of Þl-
ter FL52. The level of the 455 kHz signal at this test
2-2
465-495 490-520
40 MHz 40 MHz
60 MHz 55 MHz
3.7 dB 3.8 dB 3.8 dB
480 MHz 510 MHz
40 dB 52 dB 54 dB
405 MHz 430 MHz
point is linearly related to the input signal level at the
antenna, allowing a convenient metering point for Þl-
ter tuning and gain measurements.
The audio detector is a peak-differential type, with the
necessary phase shift (90û at 455 KHz) provided by L-C
network L61. Recovered audio from U51-5 is routed to
the receiver audio circuitry on the logic board, and to
the squelch circuitry contained in U51. When an on-
channel signal is present, the amount of high-fre-
quency audio noise at the detector output is reduced.
This change in noise level is sensed to indicate the pres-
ence of an on-channel signal. Audio noise at U51-5 is
applied to U51-7 via R61 and C82. Extreme high-fre-
quency noise is removed by C81. The noise is ampliÞed
and appears at U51-6 where it is coupled via C80 to the
SQUELCH adjust pot R60. The output of this control is
applied via R59, C79 and C78 to pin 8 which is the
input of a limiting ampliÞer and threshold detector.
Noise levels greater than a preset threshold cause U51-
11 to go high. This is buffered by Q53 and routed to the
microcomputer circuitry on the logic board. This corre-
sponds to no channel activity. When the noise level
decreases below the threshold, due to on-channel qui-
eting, U51-11 goes low, providing a low to the logic cir-
cuitry. This implies an on-channel signal is present,
causing unmuting of the receive audio path by the
microcomputer.
Components R58, C75 and C76 determine squelch time
constants as a function of the charging currents sup-
plied by U51. These charging currents vary from weak
to strong signal conditions, providing a variable
squelch closing time-constant. For weak signals the
time constant is long to minimize ÒchatteringÓ or rapid
muting and unmuting of the audio. For strong signals,
where the carrier-absent to carrier-present conditions
are substantial, the closing time-constant is shortened
to minimize the length of the Òsquelch-tailÓ.

Frequency Synthesizer

To determine the synthesizerÕs operating frequency,
the microcomputer loads the frequency divider infor-
mation into the PLL IC U101 (see Figure 2-2). The PLL
IC contains three programmable dividers. The pro-
gram is serially loaded via the SR DATA line to U101-
10. The data is loaded one bit at a time, with each low-
to-high transition of the SR CLOCK at U101-11 latching
data from shift registers into the reference divider (R),
divide-by-N, or divide-by-A latches depending on the
control bit. A logic high of the control bit selects the ref-
erence counter latch, while a logic low selects the
divide-by-N, or divide-by-A counter latch.
After the microcomputer loads data into the PLL IC,
the SYNTH LATCH ENABLE line goes low. The syn-
thesizer is then ready to generate a receive Þrst-injec-
tion or transmit frequency.
68 No.
Name of Manual
March, 1997