Motorola GM300 Service Manual page 28

Name of Manual
In UHF radios, for example, the latches are loaded with
data to give 5 kHz (or 6.25 kHz) at the output of the
divide-by-R counter when the reference signal is
applied at U101-1, and 5 kHz (or 6.25 kHz) at the out-
put of the divide-by-N counter when the VCO is oper-
ating at the desired receive injection or transmit
frequency.
During the frequency synthesis, the divide-by-A and
divide-by-N counters begin counting down from the
programmed values (A and N respectively) at the same
time. The modulus control line U101-12 is low so the
divide-by-127/128 prescaler divides by 128. Therefore,
the effect of the prescaler U102 is to divide the VCO
output by 128 and apply it to U102-8. When the divide-
by-A counter completes counting down, the control
logic sets the modulus control line high, and the
divide-by-127/128 prescaler divides by 127 until the
divide-by-N counter completes the programmed value
on N. After the divide-by-N counter completes count-
ing down, the counters are set back to their pro-
grammed values. The effect of the prescaler and
divide-by-A, divide-by-N counters is to divide the
VCO frequency by a number, N, where:
March, 1997
Figure 2-1. Receiver IC Block Diagram
The output of the divide-by-N counter is equal to:
When the phase-locked loop is locked:
f
VCO
The reference oscillator frequency is 14.4 MHz and the
output of the divide-by-R must be 5 kHz. Therefore:
The values of A and N are dependent on the desired
VCO frequency which is equal to the transmit fre-
quency, or to the receive frequency minus 45.1 MHz
(for UHF radios).
The 5 kHz outputs of the divide-by-A and divide-by-N
counters are applied to phase detector A. The output of
68 No.
N = 128 x A + 127 x (N-A) = 127 x N + A
f / (127 x N + A)
VCO
/ (127 x N + A) = 5 kHz = f
R = 14.4 MHz / 5 kHz
N = integer part of N
A = remainder of N
Theory of Operation
RF Board
T
/ N
VCO
/ 127
T
/ 127
T
2-3