IBM 5150 Hardware Reference Manual page 155

Divisor Latch Least Significant Bit (DLL)
3F8 DLAB=l
BIT
7 6
5
4
3
2
o
LS
BIT 0
BIT 1
BIT 2
BIT 3
BIT4
' - - - - - - - - - - - - - - - BIT 5
BIT 6
BIT 7
Divisor Latch Most Significant Bit (DLM)
3F9 DLAB=l
BIT
7 6 5 4
3
2 1 0
I
L...
BIT8
~BIT9
'----------t~
BIT 10
' - - - - - - - - - . BIT 11
L . . -_ _ _ _ _ _ _ _ _ _ _
BIT 12
' - - - - - - - - - - - - -__ BIT 13
' - - - - - - - - - - - - - - -__ BIT 14
" - - - - - - - - - - - - - - - - -_ _ BIT 15
Table 23 illustrates the use of the Baud Rate Generator with a
frequency of 1.8432 Mhz. For baud rates of 9600 and below, the error
obtained is minimal.
Note: The maximum operating frequency of the Baud Generator is
3.1 Mhz. In no case should the data rate be greater than 9600 Baud.
2-136