Serial-Parallel : BU2099FV
(Final unit IC205, Control unit IC530,
Display unit IC4, TX-RX 1 unit IC5,16,17,
TX-RX 2 unit IC2)
Block diagram
1
VSS
2
NC
3
DATA
LPF
CLOCK
4
5
LCK
6
Q0
Q1
7
Q2
8
Q3
9
Q4
10
Pin description
No.
Name
I/O
1
Vss
–
GND
2
NC
–
NC
3
DATA
I
Serial data input.
4
CLOCK
I
Shift register shift clock
(rising edge trigger).
5
LCK
I
Storage register latch clock
(rising edge trigger).
6~17
Q0~Q11
O
Paralle data output
(Qx)
(Nch open drain FET).
18
SO
O
Serial data output.
19
OE
I
Output enable control input.
20
VDD
–
Power
SEMICONDUCTOR DATA
20 VDD
19
OE
Control
circuit
18
SO
Q11
17
Q10
16
Q9
15
Q8
14
13
Q7
Q6
12
11
Q5
Description
Latch data
L
H
Output FET
On
Off
D flip-flop : TC7WH74FU (Filter unit IC2)
Logic diagram
(7)
PR
S
(1)
CK
C
(2)
D
D
(6)
CLR
R
Truth table
Input
CLR
PR
D
L
H
X
H
L
X
L
L
X
H
H
L
H
H
H
H
H
X
X : Don't care
Analog Switch : TC74HC4052AFT (Control unit IC6)
Analog Switch : TC74HC4053AFT (Control unit IC5)
Mixer : TC74HC4053AFT (TX-RX 1 unit IC3)
Logic diagram
TC74HC4052AFT
MUXDMUX
(10)
A
0
0
4 x
(9)
3
B
1
(6)
INH
G4
(12)
0
0X
(14)
1
1X
(13)
X-COM
0...3
(15)
2
2X
(11)
3
3X
(1)
0Y
(5)
1Y
(3)
Y-COM
(2)
2Y
(4)
3Y
Truth table
Control inputs
Inhibit
C*
B
A
L
L
L
L
L
L
L
H
L
L
H
L
L
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
L
H
H
H
H
X
X
X
X : Don't care, * : Except HC4052A
TS-2000/X
(5)
Q
(3)
Q
Output
Function
CK
Q
Q
X
L
H
Clear
X
H
L
Preset
X
H
H
–
↑
L
H
–
↑
H
L
–
↓
Qn
Qn
No change
TC74HC4053AFT
MUXDMUX
(6)
INH
G2
(11)
(12)
A
2 x 0
0
0X
2 x 1
(13)
(14)
X-COM
0,1
1
1X
(10)
(2)
B
0Y
(15)
(1)
Y-COM
1Y
(9)
(5)
C
0Z
(3)
(4)
Z-COM
1Z
"ON" channel
HC4052A
HC4053A
0X, 0Y
0X, 0Y, 0Z
1X, 1Y
1X, 0Y, 0Z
2X, 2Y
0X, 1Y, 0Z
3X, 3Y
1X, 1Y, 0Z
– –
0X, 0Y, 1Z
– –
1X, 0Y, 1Z
– –
0X, 1Y, 1Z
– –
1X, 1Y, 1Z
None
None
41