TS-2000/X
Main CPU : 64F2633xxxx (Control unit IC8)
Pin function
No.
Name
I/O
1
MD1
I
2
MD2
I
3,4
NC
–
5~8
HA0~HA3
O
9
Vss
–
10
HA4
O
11
Vcc
I
12~14
HA5~HA7
O
15
Vss
–
16
ADC1
O
17
PVcc
I
18
ADC2
O
19
PSC
O
20
DASH
I
21
DOT
I
22
STSC
O
23
CKY
O
24
CTS2
I
25
RTS2
O
26
TXD2
O
27
RXD2
I
28
RES
O
29
Vss
–
30
BEEP
O
31
PCK
O
32
PDA
O
33
DATA
O
34
PSW
I
35,36
NC
–
37
CLOCK
O
38
MRBK
O
39
SRBK
O
40
MABK
O
41
SABK
O
34
SEMICONDUCTOR DATA
Function
Operation mode setting pin 1.
Connect to Vcc.
Operation mode setting pin 2.
Connect to Vcc.
Address bus.
GND.
Address bus.
3.3V.
Address bus.
GND.
Analog switch control signal.
5V.
Analog switch control signal.
Power relay control.
Electronic key dash signal.
Electronic key dot signal.
RS-232 IC start instruction.
Transmission power output specification.
UART operation instruction input from
personal computer control.
UART operation instruction output to
personal computer control.
Data output to PC/IF.
Data input from PC/IF.
Peripheral equipment reset input.
GND.
Beep pattern output to DSP.
PLL unit common clock output.
PLL unit common data output.
Common data output.
Power switch interrupt.
Common clock output.
Main RBK output.
Sub RBK output.
Main ABK output.
Sub ABK output.
No.
Name
I/O
42
DRES
O
DSP reset output.
43
ULK
I
Main/sub common unlock signal.
44
12ULK
I
1.2GHz band unlock signal.
45
DREN
O
DRU-3 enable.
46
ESCK
O
EEPROM clock output.
47
ESI
O
EEPROM data output.
48
Vss
–
GND.
49
HD0
O
Data bus.
50
PVcc
I
5V.
51~57
HD1~HD7
O
Data bus.
58
TXD0
O
Data output to main unit panel.
59
RXD0
I
Data input from main unit panel.
60
PVcc
I
5V. Power supply pin for pin 52~61.
61
START
I
Interrupt for returning from sleep mode.
(PC/mobile head)
62
Vss
–
GND.
63
TXD1
O
Data output to mobile head.
64
RXD1
I
Data input from mobile head.
65
BOVR
I
Over voltage detection interrupt.
66
TTO
O
AT-300 control signal.
67,68
NC
–
69
TSO
O
AT-300 control signal.
70
TTI
I
AT-300 control signal.
71
AMD
I
Amplitude comparison detection inst-
ruction input.
72
CSD2
O
DSP control chip select 2
73
CSD1
O
DSP control chip select 1.
74
TSI
I
AT-300 control signal.
75
NC
O
76
PLLVcc
I
Internal PLL oscillator power 3.3V.
77
PLLCAP
I
78
PLLVss
–
Internal PLL oscillator GND.
79
RESET
I
Hard reset input.
80
NMI
I
Normally H.
81
STBY
I
Hardware standby pin. Normally : H
82
FWE
I
Flash light enable.
Normally : L, During writing : H
83
XTAL
I
Crystal oscillator 11.0592MHz.
Function