Sailor RT2047 Technical Manual page 54

2 CIRCUIT DESCRIPTION
When the radio is switched on the dividing figure corresponding to the first figure in the selcall number
is put on port A on the µC which is connected to the input of U18-6. If the correct tone is received the output
of the comparator U15/1-6 goes low. This output is connected to the µC's INT-pin. When the tone
disappears again the µC will put out the dividing figure corresponding to the next figure in the selcall
number. If all five tones are received correctly then the µC will send a message on the serial interface to
the keyboard unit, turn on the selcall relay RE2-9 (on the filter unit), and send out an alarm tone from PC1
via the volume control and power amp. to the loudspeaker. The alarm tone lasts for 10 seconds after an
individual call and after an all call it lasts until the selcall is reset. If the SELCALL TEST button is activated
the alarm circuits and indicators will be tested.
2.6.13 THE EEPROM
The EEPROM contains an address/opcode register, a data I/O register, a memory array, an internal high
voltage generator (V ) and some decoding logic. The Serial Data Clock (CK) is fed from PC7 on the µC
pp
and all communication starts with the µC setting PC5 thus enabling the Chip Select (CS) on the eeprom
(U8-6). Instructions to U8-6 consists of a dummy 1, a 2 bit opcode, an 8 bit address and for some
instructions also a 16 bit data word. When the opcode is 00 the 2 first bits in the address serve as an
extended opcode.
INSTRUCTION SET FOR THE EEPROM (NMC93C56):
,QVWUXFWLRQ 2S
FRGH
READ 10
EWEN 0
ERASE 11
ERAL 0
WRITE 1
WRAL 0
EWDS 0
READ:
After a Read instruction is received, the instruction and address are decoded, followed by data transfer
from the selected memory register. A dummy 0 precedes the 16-bit data output string. Output data
changes are initiated by a low to high trasition of the SK clock.
WRITE:
The Write operation is followed by 16 bits of data to be written to the specified address. CS must then be
brought low before the next rising edge of the SK clock to initiate the self-timed programming cycle. D0
indicates the ready state ( 1/0 => ready/busy ) the chip is ready for another instruction.
PAGE 2-20
$GGUHVV 'DWD
A7-A0
11XXXXXX
A7-A0
10XXXXXX
A7-A0 D15-D0
01XXXXXX D15-D0
00XXXXXX
&RPPHQW
Reads data at specified address
Write enable, must precede all
programming modes
Erase register A7-A0
Erase all registers
Writes reg if address unprotected
Writes all registers. Valid only when
Protect Reg is cleared
Disables all programming instructions
RT2047 DSC - PART II
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