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7. LVDS(Camera Link) Interface Usage
LVDS(Low Voltage Differential Signal) Interface control
I/O Address
Function
Offset
C0h
C4h
LVDS
C8h
CCh
31
30
29
28
27
26
D31
31
Bit
Name
0
Enable
1
Reset
2
Data
Enable
3
Interrupt
Enable
4
Start
31
30
29
28
27
26
P15
Register
LVDS_DATA
LVDS_CMD
LVDS_CNT
LVDS_STA
LVDS
Data Register Bit Position & meaning
25
24
23
22
21
20
19
LVDS
Command Register Bit Position & meaning
Reserved
Used for simulation
LVDS
Internal counter Register Bit Position & meaning
25
24
23
22
21
20
19
Pixel Counter
2005 DAQ system, all rights reserved.
PCI-FRM01 Register Level Application Guide
LVDS Data register
LVDS Command register
LVDS Internal counter register
LVDS Status register
18
17
16
15
14
13
12
Data
Description
18
17
16
15
14
13
12
P0
L15
Application Note
Description
11
10
9
8
7
6
5
5
11
10
9
8
7
6
5
Line Counter
http://www.daqsystem.com
(AN241)
4
3
2
1
0
D0
4
3
2
1
0
S
I
D
R
E
Default
Value
'0'
'0'
'0'
'0'
'0'
4
3
2
1
0
L0
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