Non-Volatile Memory (Nvm); Introduction; Nvm Programming Procedure Overview - Intel 8 LAN Information Manual

ICH8—NVM Information Guide
1.0

Non-Volatile Memory (NVM)

1.1

Introduction

The document is intended for designs using the 10/100/1000 Mb/s LAN controller that
is integrated into the Intel
The NVM space is used for hardware and software configuration. It is also read by
software to determine and configure specific design features.
Unless otherwise specified, all numbers in this document use the following numbering
convention:
• Numbers that do not have a suffix are decimal (base 10).
• Numbers with a suffix of "h" are hexadecimal (base 16).
• Numbers with a suffix of "b" are binary (base 2).
1.2

NVM Programming Procedure Overview

The LAN NVM shares space on an SPI Flash device (or devices) along with the BIOS,
Manageability Firmware, and a Flash Descriptor Region. It is programmed through the
ICH8. This combined image is shown in
define vendor specific information and the location, allocated space, and read and write
permissions for each region. The Manageability (ME) Region contains the code and
configuration data for ME functions such as Intel
and Advanced Fan Speed Control. The system BIOS is contained in the BIOS Region.
The ME Region and BIOS Region are beyond the scope of this document and a more
detailed explanation of these areas can be found in the Intel
(ICH8) Family External Design Specification (ICH8 EDS). This document describes the
LAN image contained in the Gigabit Ethernet (GbE) region. Fast Ethernet (82562V)
images are also described.
®
I/O Control Hub 8 (ICH8) device.
Figure 1. The Flash Descriptor Region is used to
®
Active Management Technology, ASF,
®
I/O Controller Hub 8
5