JVC KS-FX945R Service Manual page 29

6.7 LC75873NW (IC601):LCD Driver
• Pin layout
61
80
• Block diagram
• Pin function
Pin No. Pin name I/O
79,80 S1/P1 to S4/P4 O Segment outouts for displaying the display data transferred by serial data input.
1,2,3 S5 to S68
to 66
67 COM1 O Common driver outputs.
78 COM2
69 COM3
74 OSC I/O Oscillator connection
76 CE I
77 CL I
78 DI I
75 INH I Display off control input
71 VDD1 I Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VDD2 when a 1/2
72 VDD2 I Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to VDD1 when a 1/2
70 VDD - Power supply connection. Provide a voltage of between 3.0 and 6.0V.
73 VSS - Power supply connection. Connect to ground.
60 41
40
21
1 20
VDD1
COMON
DRIVER
VDD2
INH
CLOCK
OSC
GENERATOR
VDD
VSS
The S1/P1 to S4/P4 pins can be used as generalpurpose output ports under serial data control.
The frame frequency f0 is given by :
f0 = (FOSC/384)Hz.
An oscillator circuit is formed by connecting an external resistor and capacitor to this pin.
Serial data transfer inputs.
Connected to the controller.
CE:Chip enable
CL:Synchronization clock
DI:Transfer data
• INH= "L"(VSS) ---Display forced off
S1/P1 to S4/P4 = "L"
(These pins are forcibly set to the segment output port function and held at the low level.)
S5 to S68 = "L"
COM1 to COM3"L"
• INH = "H"(HDD)---Display on
However, serial data transfer is possible when the display is forced off by this pin.
bias drive scheme is used.
bias drive scheme is used.
SEGMENT DRIVER
SHIFT REGISTOR
ADDRESS
DETECTOR
Description
(No.49875)1-29