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MAIN BOARD IC501 R5F364AMDFA (SYSTEM CONTROLLER)
Pin No.
Pin Name
1
DAMP_SCDT/DIR_DI
DAMP_SHIFT/
2
DIR_CL
3
FL_CS
4
SIRCS_IN
5
FL_DOUT
6
CEC_RX_IN
7
FL_CLK
8
BYTE
9
CNVss
10
Xcin
11
Xcout
12
RESET
13
Xout
14
Vss
15
Xin
16
Vcc
17
CEC (TX/RX)
18
NO USE
19
KEY_INT
20
AC_CUT
21
BD_IF_START
22
ST_DO
23
ST_CLK
24
ST_DI
25
BD_IF_REQ
26
CEC_TX_OUT
27
PCONT_FL
28
LED_PWM
29
S-AIR_SDA
30
S-AIR_SCL
31
TXD1
32
RXD1
33
S-AIR_GPIO2
34
S-AIR_ADC_SEL
35
BD_RESET
36
BD_CS
BD_PCONT1 to
37 to 39
BD_CONT3
40
BD_PCONT4
BD_PCONT5,
41, 42
BD_CONT6
43
P_CONT1
44
FAN_ON
45
FAN_CONT
46
CE
47
BD_BDI
48
BD_BDO
49
BD_SCLK
50
DRIVER_RST (EN)
OVERFLOW1,
51, 52
OVERFLOW2
53
DAMP_INT
54
DAMP_SOFT_MUTE
DAMP_LATCH1 to
55 to 57
DAMP_LATCH3
58 to 61
NO USE
62
Vcc
63
S-AIR_SRC_RST
64
Vss
I/O
O
Serial data output to the stream processor
O
Serial data transfer clock signal output to the stream processor
O
Chip select signal output to the fl uorescent indicator tube driver
I
SIRCS signal input from the remote control receiver
O
Serial data output to the fl uorescent indicator tube driver
-
Not used
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
I
External data bus width selection signal input terminal
I
Processor mode selection signal input terminal
I
Sub system clock input terminal
O
Sub system clock output terminal
I
System reset signal input from the reset signal generator
O
Main system clock output terminal (6 MHz)
-
Ground terminal
I
Main system clock input terminal (6 MHz)
-
Power supply terminal (+3.3V)
I/O
CEC serial data input/output with the HDMI ARC OUT connector
-
Not used
I
Key wake-up signal input terminal
I
AC cut detection signal input terminal
O
Busy request signal output to the BD decoder
I
Serial data input from the tuner (FM)
O
Serial data transfer clock signal output to the tuner (FM)
O
Serial data output to the tuner (FM)
I
Request signal input from the BD decoder
-
Not used
O
Power on/off control signal output terminal for the front panel section
O
LED drive signal output terminal
I/O
Two-way I2C data bus with the wireless transceiver
O
I2C clock signal output to the wireless transceiver
-
Not used
-
Not used
I
Interrupt signal input from the wireless transceiver
O
Data selection signal output terminal for S-AIR section
O
Reset signal output to the BD decoder, NAND fl ash, EEPROM and ethernet interface
O
Chip select signal output to the BD decoder
O
Power on/off control signal output terminal for the BD section
O
Power on/off control signal output terminal
O
Power on/off control signal output terminal for the BD section
O
Power on/off control signal output terminal
O
Power on/off control signal output terminal for the FAN motor
O
FAN motor on/off control signal output terminal
-
Not used
O
Serial data output to the BD decoder
I
Serial data input from the BD decoder
I
Serial data transfer clock signal input from the BD decoder
O
Reset signal output to the power amplifi er
O
Overfl ow detection signal input from the stream processor
O
Reset signal output to the stream processor
O
Soft muting on/off control signal output to stream processor
O
Serial data latch pulse signal output to the stream processor
-
Not used
-
Power supply terminal (+3.3V)
O
Reset signal output to the S-AIR section
-
Ground terminal
HBD-E370/E470/E570/E870/T57
Description
Not used
Not used
Not used
89
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