Circuit Description - JBL JSR-400 Service Manual

Dolby pro-logic audio/video surround receiver
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Dolby Pro-Logic
A/V Receiver
Ò
1. Surround Circuits
This model incorporates a surround processor circuit.
Fig. 1 is a block diagram of the surround processor circuit. The microprocessor transfers the data to the Dolby Pro-Logic
decoder and Time Delay Device to operate the circuits in each mode.
IC5
Buffer
LC4966
L Input
Buffer
R Input
IC10
NJW1102
X1
X1
Noise
Generator
1) BYPASS
Set to this mode to listen to ordinary stereo sound. The rear L/R and center outputs will be muted.
Fig. 2

CIRCUIT DESCRIPTION

V
V
LR
CS
Input
Adaptive
Auto-
Matrix
balance
Control
S
By-Pass Line
Noise
Sequencer
7knz
Modified
LPF
Dolby B NR
S
IC11
Time
Delay
NJU9702
SOURCE
L
SOURCE
R
L
R
C
Center/
Operating
Mode
AMP
Control
C
C
S
electric
S
AMP
vol.
S
IC5
LC4966
SURROUND
SURROUND
TONE
CONTROL
AMP
L
C
AMP
TONE
MASTER
R
CONTROL
AMP
VOLUME
S
AMP
Fig. 1
Block diagram of the surround
processor circuit
OUTPUT
OUTPUT
JSR-400
SPEAKER
FRONT L
CENTER
FRONT L
SURROUND L
SURROUND L
1 3

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