List Of Figures - Compaq iPAQ 1.0 Technical Reference Manual

F 2-1. C PAQ D
IGURE OMPAQ I
F 2-2. C PAQ D
IGURE OMPAQ I
F 2-3. C PAQ D
IGURE OMPAQ I
F 2-4. C PAQ 1.0/1.2 D
IGURE OMPAQ I
F 2-5. C PAQ 2.0 C
IGURE OMPAQ I
F 2-6. C PAQ 1.0/1.2 S
IGURE OMPAQ I
F 2-7. C PAQ 2.0 S
IGURE OMPAQ I
F 2-8. C PAQ 1.0/1.2 A
IGURE OMPAQ I
F 2-9. C PAQ 2.0 A
IGURE OMPAQ I
F 2-10. P
IGURE ROCESSOR
F 3-1. P /M
IGURE ROCESSOR
F 3-2. C P
IGURE ELERON ROCESSOR
F 3-3. P III P
IGURE ENTIUM
F 3-4. S M
IGURE YSTEM EMORY
F 4-1. PCI B D
IGURE US EVICES AND
F 4-2. C
IGURE ONFIGURATION
F 4-3. PCI C
IGURE ONFIGURATION
F 4-4. M I
IGURE ASKABLE
F 4-5. C
IGURE ONFIGURATION
F 5-1. 40-P P
IGURE IN RIMARY
F 5-2. 68-P M
IGURE IN ULTIBAY
F 5-3. S I
IGURE ERIAL NTERFACE
F 5-4. S I
IGURE ERIAL NTERFACE
F 5-5. P I
IGURE ARALLEL NTERFACE
F 5-6. 8042-T -K
IGURE O EYBOARD
F 5-7. K
IGURE EYBOARD OR
F 5-8. USB I/F, B
IGURE LOCK
F 5-9. USB P
IGURE ACKET
F 5-10. U
IGURE NIVERSAL
F 5-11. A S
IGURE UDIO UBSYSTEM
F 5-12. AC'97 L
IGURE INK
F 5-13. AD1881
IGURE OR
F 5-14. N I
IGURE ETWORK
F 5-15. E TPE C
IGURE THERNET
F 6-1. G S
IGURE RAPHICS UBSYSTEM
F 6-2. GMCH I
IGURE NTEGRATED
F 7-1. P D
IGURE OWER ISTRIBUTION AND
F 7-2. PAQ 1.0/1.2 P
IGURE I
F 7-3. PAQ 2.0 P
IGURE I OWER
F 7-4. PAQ 1.0/1.2 S
IGURE I
F 7-5. PAQ 2.0 S
IGURE I IGNAL
F 7-6. S B
IGURE YSTEM OARD
F B-1. ASCII C
IGURE HARACTER

LIST OF FIGURES

P C
ESKTOP ERSONAL
, F V
ESKTOPS RONT IEWS
, R V
ESKTOPS EAR IEWS
C
ESKTOP HASSIS
L .................................................................................... 2-7
HASSIS AYOUT
B
YSTEM OARD
B L
YSTEM OARD AYOUT
, B
RCHITECTURE
, B
RCHITECTURE LOCK DIAGRAM
A M
SSEMBLY AND OUNTING
S A
EMORY UBSYSTEM RCHITECTURE
I A
NTERNAL RCHITECTURE
I A
ROCESSOR NTERNAL RCHITECTURE
M ......................................................................................................... 3-7
AP
F ......................................................................................... 4-2
UNCTIONS
C ......................................................................................................... 4-4
YCLE
S M ................................................................................... 4-5
PACE APPING
P , B
NTERRUPT ROCESSING
M M ........................................................................................... 4-11
EMORY AP
IDE C (
ONNECTOR ON SYSTEM BOARD
C ( M
ONNECTOR ON ULTIBAY BOARD
C (M
ONNECTOR ALE
H ( PAQ 1.2
EADER I
C (F
ONNECTOR EMALE
T
RANSMISSION OF
P D I
OINTING EVICE NTERFACE
D ................................................................................................... 5-22
IAGRAM
F ........................................................................................................ 5-23
ORMATS
S B C ................................................................................. 5-25
ERIAL US ONNECTOR
F B
UNCTIONAL LOCK
B P .............................................................................................. 5-28
US ROTOCOL
AD1885 A C F
UDIO ODEC
C B
NTERFACE ONTROLLER
(RJ-45,
ONNECTOR VIEWED FROM CARD EDGE
, B
LOCK DIAGRAM
G S
RAPHICS UBSYSTEM
C , B
ONTROL
C D
OWER ABLE IAGRAM
C D ....................................................................................... 7-5
ABLE IAGRAM
D D
IGNAL ISTRIBUTION
D D
ISTRIBUTION IAGRAM
H P ........................................................................................ 7-9
EADER INOUTS
S ........................................................................................................B-1
ET
Compaq iPAQ Series of Desktop Personal Computers
Second Edition - February 2001
................................................................. 2-1
OMPUTERS
............................................................................. 2-4
............................................................................... 2-5
L .............................................................. 2-6
AYOUT
L ................................................................ 2-8
AYOUTS
........................................................................ 2-9
................................................... 2-11
LOCK DIAGRAM
......................................................... 2-13
........................................................................... 2-15
.............................................................. 3-1
................................................................. 3-2
............................................................. 3-3
D ........................................................ 4-7
LOCK IAGRAM
). ...................................................... 5-3
). ....................................................... 5-4
DB-9
AS VIEWED FROM REAR OF CHASSIS
- 2.0
LEGACY FREE AND SYSTEM BOARDS ONLY
DB-25
AS VIEWED FROM REAR OF CHASSIS
C ED , T D
ODE H IMING IAGRAM
C .................................................. 5-21
ONNECTOR
D ........................................................... 5-27
IAGRAM
B D
UNCTIONAL LOCK IAGRAM
D ...................................................... 5-32
LOCK IAGRAM
)...................................... 5-36
.............................................................................. 6-2
......................................................................... 6-3
D ....................................................... 7-1
LOCK IAGRAM
................................................................................. 7-4
..................................................................... 7-7
IAGRAM
........................................................................... 7-8
Technical Reference Guide
)............... 5-6
) ........ 5-7
) .. 5-14
.............................. 5-15
................................. 5-29
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