Interrupt Controllers - HP 525 5/XX Technical Reference Manual

The following table summarizes how the DMA channels are allocated.
First DMA controller (used for 8-bit transfers)
Channel
0 Available
1 Available or ECP mode for parallel port
2 Floppy disk I/O
3 Available or ECP mode for parallel port
Second DMA controller (used for 16-bit transfers)
Channel
4 Cascade from first DMA controller
5-6 Available
6-7 Available

Interrupt Controllers

(BIOS version: GJ.07.xx)
The system has two 8259A compatible interrupt controllers. They are
arranged as a master interrupt controller and a slave that is cascaded
through the master.
The following table shows how the master and slave controllers are
connected. As the HP Vectra 500 Series incorporates the Plug and Play
mode, some of the IRQ settings indicated in the following table could be
different. This table should be used as a guideline only. The Interrupt
Requests (IRQ) are numbered sequentially, starting with the master
controller, and followed by the slave.
IRQ (Interrupt Vector)
IRQ0(08h)
IRQ1(09h)
IRQ2(0Ah) Slave IRQ
IRQ8(70h)
IRQ9(71h)
IRQ10(72h)
IRQ11(73h)
4 Summary of the HP/Phoenix BIOS
HP/Phoenix BIOS (BIOS version: GJ.07.xx)
Function
Function
Interrupt Request Description
System timer
Keyboard controller
Cascade connection from INTC2 (Interrupt Controller 2)
Real time clock
Available for PCI expansion cards, if not used by ISA boards
Available for PCI expansion cards, if not used by ISA boards
Available for PCI expansion cards, if not used by ISA boards
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