LG 42PG20 Training Manual page 41

Z-bIAS ADJUSTMENT
The Z-Sus Drive section is now located on the Y-Sus board. Set should run for 15 minutes
in "Heat Run" mode prior to any adjustments. Set screen to white wash mode or 100IRE
White input. Adjust VZ (Z-Bias) to 100V (+/- 1V).
Y-Sus
Output
ICs
Y-Sus
Section
Z-Bias ADJ VR905
Board Voltage
Y-Sus
Z-Sus Z-Bias
FS202 (Vs)
4A 250V
Z-Sus
Section
FS701 (Va)
P202
10A
5V/Va to Left X
Z-Sus Input Voltages
Description
VS is input at P3 pins 1 and 2 and supplied to the
VS
driver IC circuit.
VA inputs at P3 pins 6 and 7 and supplied to the
VA
driver IC circuit.
5V in input P3 pins 9 and 10. It is used to Bias
M5V VCC
the circuits on the Z_ SUS board.
Z Bias Voltage is used to Bias the output circuits
driving the Sustain and Erase
Pulses, removing previous images from the
PDP. Z-bias is measured from the
Vzb TP on the Z -SUS board and adjusted by
VZB Adj.
CIRCUIT DeSCRIPTIONS
Read the Label on the back of the
upper left hand side of the panel.
P201
Adjust R946 to that voltage.
Vs & Va
From SMPS
-
FS201
5V
P801
Z-Drive to
Z output
Z-Bias TP R496
P101
Logic Signals
From Control
+
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PDP Training - Fall 2008
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