MSI G52-73501X1 User Manual page 64

Advance DRAM Configuration
Press <Enter> to enter the sub-menu and the following screen appears.
M emory Timings
This field has the capacity to automatically detect all of the DRAM timing. If you
set this field to [Manual], the following fields will be selectable.
tCL (CAS Latency)
W hen the Memory Timings sets to [Manual], the field is adjustable.This con-
trols the CAS latency, which determines the timing delay (in clock cycles) before
SDRAM starts a read command after receiving it.
tRP
W hen the Memory Timings sets to [Manual], the field is adjustable. This item
controls the number of cycles for Row Address Strobe (RAS) to be allowed to
precharge. If insufficient time is allowed for the RAS to accumulate its charge
before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain
data. This item applies only when synchronous DRAM is installed in the system.
tRAS
W hen the Memory Timings sets to [Manual], the field is adjustable. This setting
determines the time RAS takes to read from and write to a memory cell.
tRRD
W hen the Memory Timings sets to [Manual], the field is adjustable. Specifies
the active-to-active delay of different banks.
tRC
W hen the Memory Timings sets to [Manual], the field is adjustable. The row
cycle time determines the minimum number of clock cycles a memory row takes
to complete a full cycle, from row activation up to the precharging of the active
r ow.
tWR
W hen the Memory Timings sets to [Manual], the field is adjustable. Minimum
time interval between end of write data burst and the start of a precharge
command. Allows sense amplifiers to restore data to cells.
BIOS Setup
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