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9.8
Video: High-end Output Processor (HOP) and
TOPIC (diagram B4)
9.8.1
General
The YUV-signals from the PICNIC are fed to the HOP (High-
end Output Processor, TDA9330). The video and geometry
control parts are integrated in the HOP. Also the RGB-signals
for TXT/OSD (from the P) are inserted via the HOP. The
geometry part delivers the H-drive, EW-drive, V-drive, and also
a drive signal for rotation.
The main functions of the HOP are:
•
Video control (contrast, brightness, saturation, etc.).
•
Deflection drive.
•
Second RGB interface for OSD/TXT.
•
Peak White Limiting.
•
Cut-off control and White Drive (RGB outputs).
•
Geometry control.
The TOPIC (The most Outstanding Picture improvement IC,
item 7302, type TDA9178) is an optional IC between the
PICNIC and the HOP. It has the following (picture
improvement) functions:
•
Luminance Transient Processor (LTP), for detail
enhancement.
•
Chrominance delay circuitry, to compensate timing
differences between Y and C.
•
Spectral processor, for improved sharpness and colour
transient improvement (CTI).
•
Colour vector processor, for skin tone correction, green
enhancement and blue stretch.
•
Measure and detection circuitry, for AutoTV.
The sandcastle pulse from the HOP is fed to pin 1 of the
TOPIC, which is used as reference for timing.
9.8.2
Video Control
After source selection, the HOP controls the signals for
Saturation, Contrast, and Brightness. Output is RGB again.
9.8.3
OSD/TXT Control
On pins 35 to 38, the RGB and fast blanking from the OTC
(OSD and TXT) are inserted. The sync signal V
from the 'FRAMEDRIVE-" signal.
9.8.4
Peak White Limiting
On pin 43 there is a Peak White Limiting signal line (PWL). If
the beam current increases, the 'EHT-info' voltage will
decrease. Average limiting via R3343/C2333 controls PWL.
9.8.5
Cut-off Control
The following will happen when you switch the TV to Standby:
1. The vertical scan is completed.
2. The vertical flyback is completed (the horizontal output is
gated with the flyback pulse, so that the horizontal output
transistor cannot be switched 'on' during the flyback pulse).
3. The 'slow stop' of the horizontal output is started, by
gradually reducing the 'on' time at the horizontal output
from nominal to zero (this will take 50 ms).
4. At the same time, the fixed beam current is forced via the
black-current-loop for 25 ms. This is done by setting the
RGB outputs to a maximum voltage of 5.6 V.
In the EM5E a 'one-point' cut-off control is used:
A current of 8 µA (for cut-off) is fed to pin 44 of the HOP. This
is done with a measurement pulse during the frame flyback.
During the first frame, three pulses are generated to adjust the
Circuit Descriptions and Abbreviation List
is derived
SYNC
EM5E
cut-off voltage at a current of 8 µA. With this measurement, the
black level at the RGB-outputs is adjusted. Therefore, at start-
up there is no monitor pulse anymore. At start-up, the HOP
measures the pulses, which come back via pin 44. The RGB-
outputs have to be between 1.5 V and 3.5 V. If one of the
outputs is higher than 3.5 V or one of them lower then 1.5 V,
the RGB-outputs will be blanked.
9.8.6
Geometry control
All geometry control is done via I
NVM (IC7011) of the SSB.
9.8.7
Deflection Control
Line Drive
The Line drive is derived from an internal VCO of 13.75 MHz.
As a reference, an external resonator is used (1301). The
internal VCO is locked with the HD
the PICNIC.
The 'PHI-2' part in the HOP receives the HFB_X-RAY_PROT
(pin 13) to correct the phase of the Line drive. The EHT-info is
supplied to pin 14 (DYN-PHASE-CORR) to compensate
picture breathing depending on the beam current.
Frame Drive
At pins 1 and 2, the symmetrical frame drive signals are
available. The V
signal, for synchronisation of the OSD/
SYNC
TXT, is derived from the 'FRAMEDRIVE-' signal.
East/West Drive
At pin 3, the E/W drive signal is available. Pin 4 is a feedback
input for the EHT-info, and is used to prevent pumping of the
picture. The EHT varies also dependent on the beam current.
E.g. for wide-screen without load this is 31.5 kV and with load
(1.5 mA) 29.5 kV.
Frame Rotation
For frame rotation, a control voltage is used from pin 25 of the
HOP. Frame rotation is only used in wide-screen sets.
9.8.8
Protections
Flash detection
When a flash occurs, the EHT-info will become negative very
fast. Via R3316, D6304, and D6303, TS7303 starts to conduct.
This makes pin 5 of HOP 'high'. The output (pin 8) is
immediately stopped.
If the H-drive stops, then also pin 5 will become 'low' again,
which will reset the flash detection.
A bit (FLS) is set in an output status register, so that the OTC
can see that there was a flash. This FLS-bit will be reset when
the OTC has read that register.
HFB protection
If the HFB is not present, this is detected via the HOP. The OTC
puts the set into protection and reads a register in the HOP. An
error code is generated.
9.9
Synchronisation (Diagram B2, B3 & B4)
The HIP video processor provides the vertical and horizontal
sync pulses V
and H
A50
incoming CVBS signal. Then these pulses are fed to the
PICNIC, where they are doubled to be synchronous with the
100 Hz picture. The outgoing pulses, V
to the HOP, which supplies the vertical and horizontal drive
pulses and the 100 Hz (2fH) sandcastle pulse.
The V
pulse from the PICNIC is inverted by TS7304 to the
D100
V
signal. The OTC is synchronised on the HFB pulse from the
D
9.
EN 115
2
C and the data is stored in the
-pulse, which comes from
100
. They are synchronised with the
A50
and H
, are fed
D100
D100
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