Control Pwb Circuit - Sharp AM-900 Service Manual

AM-900U
FAX CHAPTER 6. E Market Service Manual Service Manual AM-900U
CIRCUIT SCHEMATICS AND PARTS LAYOUT

[1] Control PWB circuit

1. Main Controller Block (1a/10)
A
Main Controller Block(1/2)
(5-B4) MODEM_INT
6
5
4
IC3A
74LV1GWU04ASCE
1
R52
X2
C11 27.5549MHz
18P
3
DG
2
IC3C
+3.3V
5
1
C20
0.1U
2
DG
74LV1GWU04ASCE
A
B
R5 C1
4.7K N.M.
DG DG
PB_ADDR[4:0]
(5-B5)
(3-F1)(5-B5) PB_DATA[7:0]
PB_DATA0
PB_DATA1
PB_DATA2
PB_DATA3
PB_DATA4
PB_DATA5
PB_DATA6
PB_DATA7
BR15 220 x4
(3-B3) /STRB2
(3-B3) /STRB3
(3-F3) /STRB0
(3-F3) /STRB1
BR16 220 x4
(3-B3) /STRB7
(3-B3) /STRB5
(3-B3) /STRB6
(3-B3) /STRB4
(4-C1)
/VSYNC
(4-C1) /SYNC
(4-B3)
C6
C7
N.M. N.M.
(4-B3)
(4-B3)
IC3B
DG
R46
10
33
6 3 4 R47
74LV1GWU04ASCE
1M
R53
0
R55
+3.3V
390
C16 N.M.
C12
18P
DG
5
1
R50
4
(4-B1)
CISSP
2
N.M.
3
R434
IC11
N.M.
N.M.
DG
DG
+3.3V
+
C33
N.M. (10U/16V)
VCC
DG
GND
B
C
R1 0
(4-F1) PDATA
(5-H5) /SPMUTE
BZCONT
(5-H4)
VOLA
(5-H5)
(5-H5) VOLB
VOLC
(5-H5)
R3 10
(5-B4) /MODEM_RESET
R423 0
(5-D1) CML
R424 0
(5-D1) ERLY
R425 0
(5-D1) DPMUTE
R426 0
(5-D1) DPON
TP1
(4-C1) /STS
R7 0
(4-F1)
/SCLK
R9 0
(4-F1) /CMD
R11 220
(5-B4)
/MODEM_CS
R13 0
(4-B3)
LEDON
R15 33
(3-A3) LCD_E
R17 33
(3-C1)
/PANEL_CS
R19 220
(5-B4) /PB_OE
R20 220
(5-B4)
/PB_WE
PB_ADDR0
PB_ADDR1 BR6
PB_ADDR2
270 x4
PB_ADDR3
PB_ADDR4 R22 270
/ADF_READ_DOC
(4-I3)
/ADF_SET_DOC
(4-I4)
/CIS_HOME
(4-I2)
BR9
270 x4
BR10
270 x4
/STRB0D
(4-A3) CRNT0
/STRB1D
(4-A3) CRNT1
/STRB2D
/STRB3D
/STRB4D
/STRB5D
/STRB6D
/STRB7D
R36 0
SCAN_PH2
R38 0
(4-B3)
SCAN_I12
R40 0
(4-B3) SCAN_I02
R41 0
SCAN_PH1
R42 0
SCAN_I11
R43 0
(4-B3)
SCAN_I01
(4-A5) CISRLED
(4-A5) CISGLED
(5-H4) TXMUTE
(5-H3) GAINC
R51 100
(4-B1) CISCLK
(4-A6) CISBLED
R54 33
(4-F2) PCURESET
R59 0
(4-F1) /DPAGE
R60 0
(4-F1)
/CPRDY
R62 0
(4-F1) /DSRDY
(4-B4)
CISVON
R64 N.M.
(1-H6) RTC_CE
R65 N.M.
(1-H6) RTC_CLK
R67 N.M.
(1-H6)
RTC_DATA
R45
N.M.
R69 0
(2-B1) /FLASH_WP
R435
N.M.
TP3
(5-H4) BZOUT
C21 27P
X3
24MHz R80
1M
R81
180
C23 33P
DG
+1.8V
OA-2000 FAX CONTROLLER
DG
C
6 – 1
D
1/10
201
GP_L0/PO_DATA0 ROM_CS_L
202
GP_L1/PO_DATA1
203
GP_L2 SDRAM_DATA0
204
GP_L3 SDRAM_DATA1
205
GP_L4 SDRAM_DATA2
206
GP_L5 SDRAM_DATA3
1
GP_L6 SDRAM_DATA4
2
GP_L7 SDRAM_DATA5
SDRAM_DATA6
SDRAM_DATA7
3
GP_M0/PO_ACK SDRAM_DATA8
4
GP_M1 SDRAM_DATA9
5
GP_M2/PO_DONE SDRAM_DATA10
6
GP_M3/CK_PWM4 SDRAM_DATA11
7
GP_M4/CK_PWM5 SDRAM_DATA12
8
GP_M5 SDRAM_DATA13
9
GP_M6 SDRAM_DATA14
12
GP_M7 SDRAM_DATA15
SDRAM_DQMA0
13
GP_N0/PB_CS0 SDRAM_DQMA1
14
GP_N1/PB_CS1 SDRAM_CS0_L
16
GP_N2/PB_CS2 SDRAM_CKE
17
GP_N3/PB_CS3 SDRAM_CLK
18
GP_N4/PB_NOE SDRAM_CS1A_L
19
GP_N5/PB_NWE
SDRAM_ADDR12
SDRAM_ADDR11
20
GP_O0/PB_ADDR0 SDRAM_ADDR10
21
GP_O1/PB_ADDR1 SDRAM_ADDR9
23
GP_O2/PB_ADDR2 SDRAM_ADDR8
24
GP_O3/PB_ADDR3 SDRAM_ADDR7
25
GP_O4/PB_ADDR4 SDRAM_ADDR6
26
GP_O5/PB_ADDR5 SDRAM_ADDR5
27
GP_O6/PB_ADDR6 SDRAM_ADDR4
28
GP_O7/PB_ADDR7 SDRAM_ADDR3
SDRAM_ADDR2
SDRAM_ADDR1
29
GP_P0/PB_DATA0 SDRAM_ADDR0
30
GP_P1/PB_DATA1
32
GP_P2/PB_DATA2 SDRAM_BANK1
33
GP_P3/PB_DATA3 SDRAM_BANK0
34
GP_P4/PB_DATA4 SDRAM_RAS_L
35
GP_P5/PB_DATA5 SDRAM_CAS_L
36
GP_P6/PB_DATA6 SDRAM_WE_L
37
GP_P7/PB_DATA7
TCK
54
GP_C0 TMS
55
GP_D0/CK_PWM2 TDI
56
GP_C1 TDO
57
GP_D1/CK_PWM3
58
GP_C2 RESET_L
59
GP_C3
61
GP_C4
62
GP_C5
63
GP_C6 RTC_XIN
64
GP_C7
RTC_XOUT
67
GP_F0/PO_PAGE_SYNC
68
GP_F1/PO_LINE_SYNC
69
GP_F2 RTC_VDD18
70
GP_F3/PO_REQ RTC_VSS
72
GP_F4
73
GP_F5
74
GP_F6
75
GP_F7 HOST0_DM
HOST0_DP
132
GP_H0/PI_TGEN0/MAIN_CLK HOST1_DM
133
GP_H1/PI_TGEN1/BASE_CLK HOST1_DP
134
GP_H2/PI_TGEN2
135
GP_H3/PI_TGEN3 HOST_AVDD33
143
GP_H4/PI_TGEN4 HOST_AVSS
144
GP_H5/PI_TGEN5
145
GP_H6/PI_TGEN6
146
GP_H7/PI_TR_TGEN DEV_DM
DEV_DP
DEV_RSDM
148
GP_J0 DEV_RSDP
149
GP_J1 DEV_VSENSE
150
GP_J2 DEV_RUP
151
GP_J3 DEV_RREF
153
GP_J4
154
GP_J5 DEV_AVDD33
155
GP_J6 DEV_AVSS
156
GP_J7
AFE_VINB
158
GP_K0 AFE_VING
159
GP_K1 AFE_VINR
177
CK_PWM1 AFE_VREFN
178
CK_PWM0 AFE_VREFP
AFE_VCM
AFE_ANAREF
181
XIN AFE_AVDD33
AFE_AVSS
180
XOUT
ADC_VIN00
ADC_VIN01
ADC_VIN03
15
IO_VDD33 ADC_VIN05
31
IO_VDD33 ADC_VIN10
40
IO_VDD33 ADC_VIN11
52
IO_VDD33 ADC_VIN13
53
IO_VDD33 ADC_VIN15
60
IO_VDD33
71
IO_VDD33 ADC_AVDD33
79
IO_VDD33 ADC_AVSS
90
IO_VDD33 ADC_AVSS
100
IO_VDD33
110
IO_VDD33
117
IO_VDD33 PLL_AVDD18
126
IO_VDD33 PLL_AVSS
136
IO_VDD33
147
IO_VDD33
157
IO_VDD33 VSS
179
IO_VDD33 VSS
208
IO_VDD33 VSS
VSS
VSS
VSS
11
CORE_VDD18 VSS
39
CORE_VDD18 VSS
65
CORE_VDD18 VSS
84
CORE_VDD18 VSS
120
CORE_VDD18 VSS
142
CORE_VDD18 VSS
172
CORE_VDD18 VSS
183
CORE_VDD18 VSS
VSS
VSS
VSS
IC1
D
E
77
78
80
81
82
83
86
87
88
89
91
92
93
94
96
97
98
99
101
102
103
104
118
106
107
108
109
111
112
113
114
116
119
122
123
124
125
127
128
129
130
173
174
175
176
161
138
139
140
137
189
190
186
187
188
191
195
194
192
193
199
200
197
198
196
162
163
165
167
168
169
164
170
166
42
43
44
45
47
48
49
50
46
41
51
184
185
10
22
38
66
76
85
95
105
115
121
131
141
152
160
171
182
207
E