Dell PowerEdge C5230 Hardware Owner's Manual page 71

Table 2-7. PEI Phase
Status Code
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
(continued)
Description
Memory initialization. Programming memory timing
information
Memory initialization. Configuring memory
Memory initialization (other).
Reserved for ASL (see ASL Status Codes section below)
Memory Installed
CPU post-memory initialization is started
CPU post-memory initialization. Cache initialization
CPU post-memory initialization. Application Processor(s)
(AP) initialization
CPU post-memory initialization. Boot Strap Processor (BSP)
selection
CPU post-memory initialization. System Management Mode
(SMM) initialization
Post-Memory North Bridge initialization is started
Post-Memory North Bridge initialization (North Bridge
module specific)
Post-Memory North Bridge initialization (North Bridge
module specific)
Post-Memory North Bridge initialization (North Bridge
module specific)
Post-Memory South Bridge initialization is started
Post-Memory South Bridge initialization (South Bridge
module specific)
Post-Memory South Bridge initialization (South Bridge
module specific)
Using the System Setup Program
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