Medalist 1080sl SCSI Product Manual, August 1995
0
DB(7–0,P)–
1
0
I/O–
1
0
MSG–
1
0
C/D–
1
0
REQ–
1
0
ACK–
1
T1
Figure 22. Synchronous write timing
Description
I/O high to data bus disable
REQ– assertion period
REQ– deassertion period
Data valid to ACK– low
ACK– assertion period
ACK– deassertion period
ACK– low to data hold
ACK– period
REQ– low to ACK– low
Last ACK– pulse high to phase
change
T2
T4
T3
T7
T8
T9
T5
T6
Symbol
Min
T1
—
T2
30.0 nsec
T3
30.0 nsec
T4
—
T5
30.0 nsec
T6
30.0 nsec
T7
10 nsec
T8
100 nsec
T9
10 nsec
T10
125 nsec
125
T10
Max
50 nsec
—
—
—
—
—
—
—
—
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