Data Register - JVC KD-LX555R Service Manual

4.3 BR24C32F (IC703) : EEPROM
• Pin Layout
VCC WP
BR24C32/F
A0 A1
• Pin function
A0 1
A1 2
A2 3
GND 4
4.4 HD74HC126FP (IC771) : Changer Control
OE1 1
A1 2
Y1
3
OE2 4
A2 5
Y2 6
Vss
7
HD74HC126
1-34 (No.49793)
SCL SDA
A2 GND
32 Kbit EEPROM ARRAY
12bit
ADDRESS SLAVE WORD
12bit
DECODER ADDRESS REGISTER
START
CONTROL LOGIC
HIGH VOLTAGE GEN.
Vcc
14
OE4
13
A4
12
Y4
11
OE3
10
A3
9
Y3
8
• Pin layout & Block diagram
PIN NAME I/O
VCC - Power Supply
GND - Ground (0V)
A0-A2 I Slave Address Set
SCL I Serial Clock Input
SDA I/O Slave and Word Address.
Serial Data Input$ Serial Data Output *1
WP I Write Protect Input
8bit
DATA
REGISTER
STOP
ACK
VCC LEVEL DETECT
Function
8 Vcc
7 WP
6 SCL
5 SDA