AOpen MX3ZA User Manual page 71

Table of Contents

Advertisement

AWARD BIOS
Chipset Features
Chipset Features
SDRAM CAS
Latency
2T
3T
Auto
Chipset Features
SDRAM RAS#
Prechatge
2T
3T
Auto
Chipset Features
Video BIOS
Cacheable
Enabled
Disabled
Chipset Features
Video RAM
Cacheable
Enabled
Disabled
4-12
SDRAM CAS Latency
SDRAM RAS# to CAS# Delay
These are timing of SDRAM CAS Latency and RAS
to CAS Delay, calculated by clocks. They are
important parameters affects SDRAM performance,
default is Auto. If you install DIMMs with SPD and set
this item to Auto, BIOS will automatically detect your
DIMMs and then set to a appropriate timing; If you
use DIMMs without SPD and set this item to Auto,
BIOS will set it to 3/3.To make sure all of these
settings in BIOS are correct, it is recommended to
use DIMMs with SPD.
SDRAM RAS# Precharge
The RAS Precharge means the timing to inactive
RAS and the timing for DRAM to do precharge before
next RAS can be issued. RAS is the address latch
control signal of DRAM row address. The default
setting is Auto.
Video BIOS Cacheable
This item lets you cache Video RAM C000.
Video RAM Cacheable
This item lets you cache Video RAM A000 and B000.

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mx3l

Table of Contents