System Block Diagram - Abit AR5 User Manual

Introduction of AR5 Features
®

System block diagram

Host BUS
CACHE
(SRAM)
TAG
PCI BUS
CD ROM &
Hard Disk
ISA BUS
Serial
Second
Level Cache
Ctrl
TVX
Tag Ctrl
TIO[0..7]
Fast
IDE
PIIX3
ALi
M5123
Fig. 1-2 System block diagram
Pentium Processor
3.3V
Addr
Ctrl
Memory
(DRAM)
Plink
TXD Ctrl
Control
Address/Data
USB USB
1 2
Universal Serial Bus
LPT
FDC
Control
Address
Data
Main
Data
PCI Device(s)
ISA Device(s)
1-5
TDX