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QuickSpecs
Configuration
Configuration
Cell Boards
Cell Details
Cell Board
Configuration Rules
Dual core PA 8900
processor module
details
The HP 9000 rp7420 Server is a symmetrical multiprocessing (SMP) server supporting up to 8
high performance dual core PA 8900 (1.1 GHz or 1.0 GHz) or PA 8800 (1.0 GHz or 900 MHz)
processor modules. A dual core processor module supports two processors resulting in a 16-
processor core server. It also supports the sx1000 chip set. The rp7420 Server can be configured
as a single SMP server or divided into two smaller, hardware partitioned (nPars), logical servers.
A minimum of one and a maximum of two cells can be ordered in an HP 9000 rp7420 Server.
Each cell can be purchased with up to four active dual core PA 8900/PA 8800 processor modules
(8 processors), or in combination with Instant Capacity processors. Four processor speeds are
supported; 1.1 GHz and 1.0 GHz (using PA 8900) or 1.0 GHz and 900 MHz (using PA 8800). The
ability to mix processor speeds within a chassis is supported (but processors within a cell or
partition must be of the same speed). PA 8800 and PA 8900 may be mixed within the same
chassis provided they are placed in different hardware partitions. PA 8800/PA 8900 and PA 8700+
processors may not be mixed in the same server The HP 9000 rp7420 (8 processor module slots)
and HP 9000 rp8420 (16 processor module slots) servers share the same cell board. A processor
module slot contains 1 dual core processor module (2 processors). The HP 9000 rp7420 Server
cell board can be carried forward to the HP Integrity rx7620 and supported Itanium processors in
that chassis. The HP 9000 rp7410 cell board (A6096A) CANNOT be carried forward to the HP
9000 rp7420 Server and must be replaced (although previous HP 9000 rp7410 memory can be
carried forward). When replacing previous HP 9000 rp7410 cell boards in an upgrade situation,
cell board and PA 8700/8700+ return credits may be used.
4 processor module slots (supporting up to 8 processors)
16 Memory DIMM slots
Cell Controller Chip-sx1000
DC-DC Power converters
Cell boards are ordered individually
Minimum: 1 cell board
Maximum: 2 cell boards
Cell slot 1 must be loaded first
1.1 GHz or 1.0 GHz frequencies
Level 2 Cache: 64 MB
Level 1 Cache: 3 MB (1.5 MB integrated cache per core)
44 bit physical addressing
4-processor set associative cache
Single bit cache error correction
4-processor superscalar
56 instruction reorder buffer
Full PA RISC 2.0 binary compatibility
DA - 11895 U.S. QuickSpecs — Version 24 — 10/1/2006
HP 9000 rp7420 Server
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