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Bus Master IDE (DMA mode).................................................................................................................................................. 87
CODEC (Coding and Decoding) ............................................................................................................................................. 88
DDR (Double Data Rated) SDRAM......................................................................................................................................... 88
DIMM (Dual In Line Memory Module)...................................................................................................................................... 88
DMA (Direct Memory Access) ................................................................................................................................................. 89
EDO (Extended Data Output) Memory .................................................................................................................................... 89
EPROM (Erasable Programmable ROM) ................................................................................................................................ 89
EV6 Bus.................................................................................................................................................................................. 90
FC-PGA (Flip Chip-Pin Grid Array).......................................................................................................................................... 90
Flash ROM ............................................................................................................................................................................. 90
FSB (Front Side Bus) Clock .................................................................................................................................................... 91
2
C Bus ................................................................................................................................................................................... 91
IEEE 1394 .............................................................................................................................................................................. 91
Parity Bit ................................................................................................................................................................................. 92
PBSRAM (Pipelined Burst SRAM) .......................................................................................................................................... 92
6