ECS X58B-A Manual page 45

* When users disable the item Configure DRAM Timing by SPD, the following
picture will show.
CMOS Setup Utility - Copyright (C) 1985-2005 American Megatrends, Inc.
CPU Current Voltage
CPU Voltage
NB Vcore
IOH Voltage
CPU VTT
CPU VTT Voltage
VDIMM
DIMM Voltage
SB Vcore
SB Voltage
Current Memory Frequency
DRAM Frequency
Configure DRAM Timing by SPD Disabled
DRAM tCL
DRAM tRAS
DRAM tRP
DRAM tRCD
DRAM tRFC
: Move Enter : Select
F1:General Help
Users can adjust the values according to those labelled on the DIMM
specification to improve the efficiency of the system. In principle, you
need set the values of tCL (CAS Latency Time), tRAS (Active to Precharge
Delay), tRP (RAS Precharge Time) and tRCD (RAS to CAS Delay).
M.I.B. (MB Intelligent BIOS)
1.21250V
1 2
1 2
Disabled
1 2
1 2
1.120 V
1 2 1 2
Disabled
1.184 V
Disabled
1.456 V
Disabled
1.232 V
Disabled
1066 Mhz
Auto
3
9
3
3
15
+/-/: Value F10: Save
F9: Optimized Defaults
Using BIOS
Help Item
ESC: Exit
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