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Intel Desktop Board DG41KR Technical Product Specification
1.6.1.5
Analog Display (VGA)
The VGA port supports analog displays. The maximum supported resolution is 2048 x
1536 (QXGA) at a 75 Hz refresh rate.
1.6.1.6
Advanced Digital Display (ADD2/MEC/ADD2+) Card
Support
The GMCH routes two multiplexed SDVO ports that are each capable of driving up to a
270 MHz pixel clock to the PCI Express x16 connector. When an ADD2/MEC/ADD2+
card is detected, the Intel GMA X4500 graphics controller is enabled and the PCI
Express x16 connector is configured for SDVO mode. SDVO mode enables the SDVO
ports to be accessed by the ADD2/MEC/ADD2+ card. An ADD2/MEC/ADD2+ card can
either be configured to support simultaneous display or can be configured to support
dual independent display as an extended desktop configuration with different color
depths and resolutions with DVI analog output only. ADD2/MEC/ADD2+ cards can be
designed to support the following configurations:
•
Low Voltage Differential Signaling (LVDS)
•
Single device operating in dual channel mode
•
HDTV output
•
HDMI support (when used with the HD Audio Link header)
1.6.1.7
PCI Express x16 Graphics
The GMCH also supports add-in discrete graphics card via the PCI Express graphics
connector.
•
PCI Express 1.1 x16:
⎯ Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each
direction (500 MB/s total). Maximum theoretical bandwidth on interface of
4 GB/s in each direction simultaneously, for an aggregate of 8 GB/s when
operating in x16 mode.
For information about
PCI Express technology
1.6.2
USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The ICH7 provides the USB controller for all ports. The port arrangement is as
follows:
•
Four ports are implemented with stacked back panel connectors
•
Four ports are routed to two separate front panel USB headers
For information about
The location of the USB connectors on the back panel
The location of the front panel USB headers
20
Refer to
http://www.pcisig.com
Refer to
Figure 9, page 43
Figure 10, page 44
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