Pci Interrupt Routing Map - Intel D845GEBV2 - OCTOBRE 2002 Manual

Intel Desktop Board D845GEBV2/D845GERG2 Technical Product Specification
Table 24.

PCI Interrupt Routing Map

PCI Interrupt Source
AGP connector
ICH4 USB UHCI controller 1 INTA
SMBus controller
ICH4 USB UHCI controller 2
AC '97 ICH4 Audio/Modem
ICH4 LAN
ICH4 USB UHCI controller 3
ICH4 USB 2.0 EHCI controller
PCI bus connector 1
PCI bus connector 2
PCI bus connector 3
PCI bus connector 4
PCI bus connector 5
PCI bus connector 6
Note: Desktop Board D845GEBV2 only
✏
NOTE
In PIC mode, the ICH4 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 23 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
58
PIRQA PIRQB
INTA INTB
INTB
INTB
INTD INTC
(Note)
(Note)
INTC INTA
(Note)
ICH4 PIRQ Signal Name
PIRQC PIRQD PIRQE
INTB
INTA
INTC
INTD
INTC
INTA INTB
INTB INTA
INTD
INTA INTB
PIRQF PIRQG PIRQH
INTD
INTA INTB INTC
INTB INTA INTD
INTC INTD
INTB
INTD INTC