Intel D845GEBV2 - OCTOBRE 2002 Manual page 111

Table 65. Primary/Secondary IDE Master/Slave Submenus (continued)
Feature
SDRAM RAS# Active to
Precharge
SDRAM CAS# Latency
SDRAM RAS# to CAS#
Delay
SDRAM RAS#
Precharge
Options
• 8
• 7
• 6 (default)
• 5
• 2.0 (default)
• 2.5
• 4
• 3 (default)
• 2
• 4
• 3 (default)
• 2
Description
Corresponds to tRAS.
Selects the number of clock cycles required to
address a column in memory.
Selects the number of clock cycles between
addressing a row and addressing a column.
Selects the length of time required before accessing
a new row.
BIOS Setup Program
111