LG RD-JT30 Service Manual page 131

The video decoder VPC3230D process multi-standard TV video signal input. The TV video
signal support both of composite and S-video input and output YUV format to
de-interlace processor FLI2200. The FLI2200 is high performance to enhance video
quality.
The DDP1000 transfer signal from PW166 to DMD for driving DMD mirror operation.
Direct Rambus Memory
The DDP1000 utilizes a high speed Direct Rambus Memory. To support the RDRAM a
Direct Rambus clock generator CDCR83 is utilized. It can transfer input clock from
50MHz to 400MHz.
The color Drum motor driver A8904 is 3-phase, 8-pole,Y configuration brush-less DC
controller with back-EMF sensing. It provides a serial port to allow the user to program
various features
and modes of operation.
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