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AR0233AT-iBGA80
AR0233AT-iBGA80
Evaluation Board
User's Manual
Evaluation Board Overview
The evaluation boards are designed to demonstrate the features of
ON Semiconductor's image sensors products. This headboard is
intended to plug directly into the Demo3 system. Test points and
jumpers on the board provide access to the clock, I/Os and other
miscellaneous signals.
Features
•
Clock Input
Default – 27 MHz Crystal Oscillator
♦
Optional Demo3 Controlled MClk
♦
•
Two-wire Serial Interface
Selectable Base Address
♦
•
MIPI Interface
•
4 lane MIPI/HiSPi (High Speed Serial Pixel) interface
•
ROHS Compliant
Block Diagram
© Semiconductor Components Industries, LLC, 2018
February, 2018 − Rev. 0
Figure 2. Block Diagram of AR0233AT Evaluation Board
EVAL BOARD USER'S MANUAL
Figure 1. AR0233AT Evaluation Board
1
www.onsemi.com
Publication Order Number:
EVBUM2541/D
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Summary of Contents for ON Semiconductor AR0233AT-iBGA80
- Page 1 The evaluation boards are designed to demonstrate the features of EVAL BOARD USER’S MANUAL ON Semiconductor’s image sensors products. This headboard is intended to plug directly into the Demo3 system. Test points and jumpers on the board provide access to the clock, I/Os and other miscellaneous signals.
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Page 2: Bottom View
AR0233AT−iBGA80 Top View LED P2 RESET Switch SW1 CLK Sel P20 FLASH/GPIO0 P7 I/O Voltage Sel P16 SHUTTER/GPIO1 P8 GPIO2 P10 GPIO3 P13 VPP P3 MULICAM SLAVE CONN P25 TEST P1 MULICAM MASTER CONN P26 SADDR2 P6 C Bypass P24 SADDR1 P5 HiSPi Mode Sel P18 SADDR0 P4... - Page 3 AR0233AT−iBGA80 Jumper Pin Locations The jumpers on headboards start with Pin 1 on the leftmost side of the pin. Grouped jumpers increase in pin size with each jumper added. Pin 1 Pins 1−4 Figure 5. Pin Locations for a Single Jumper. Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right Pin 1 Figure 6.
- Page 4 AR0233AT−iBGA80 Table 1. JUMPERS AND HEADERS (continued) Jumper/Header No. Jumper/Header Name Pins Description FLASH Open (Default) +5V0 FLASH +3V3 SHUTTER/GPIO1 Open (Default) 1−2 GPIO1 pulled high to logic 1 2−3 GPIO1 set to logic 0 Pin−2 Shutter option ATEST1 Open (Default) External Test signal can be provided for Analog test 1−2 ATEST2 pin is connected to GND...
- Page 5 X50/x51 X60/x61 X70/x71 Interfacing to ON Semiconductor Demo3 Baseboard Table 3. SHORTENED JUMPERS FOR POWER The ON Semiconductor Demo 3 baseboard has a similar MEASUREMENT 52-pin connector P5 which mates with J1 of the headboard. Jumper Voltage (V) The four mounting holes secure the baseboard and the JP1 (From Demo3) headboard with spacers and screws.
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Page 6: Additional Information
onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf.
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