ASROCK SBC-260 Settings Manual

SBC-260
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Licensing LLC in the United States and other
countries.
Revision History
Date Description
February 17, 2023 First Release
August 25, 2023 Second Release
November 7, 2024 Third Release
April 25, 2025 Fourth Release
June 13, 2025 Fifth Release
1 : 2W Audio AMP Output Wafer (SPEAKER1)
Pin Signal Name
1 SPK L-
2 SPK L+
3 SPK R+
4 SPK R-
2 : Front Panel Audio Header (HD_AUDIO1)
Pin Signal Name Signal Name Pin
1 MIC1_L GND 2
3 MIC1_R 4
5 OUT2_R MIC1_RET 6
7 J_SENSE 8
9 OUT2_L OUT_RET 10
3 : CPU FAN Connector (+12V) (CPU_FAN1)
Pin Signal Name
1 GND
2 +12V
3 CPU_FAN_SPEED
4 FAN_SPEED_CONTROL
4 : SATA Power Output Connector (SATA_PWR1)
Pin Signal Name
1 +5V
2 GND
3 GND
4 +12V
5 : SATA3 Connector (SATA3_0)
Pin Signal Name
1 GND
2 SATA-A+
3 SATA-A-
4 GND
5 SATA-B-
6 SATA-B+
7 GND
6 : MIPI Connector (MIPI1) (BOM Option)
Pin Signal Name Pin Signal Name
1 GND 19 +2.8V
2 CSI_B_DN2 20 +1.8V
3 CSI_B_DP2 21 +1.2V
4 GND 22 GND
5 CSI_B_DN1 23 IMBCLKOUT0
6 CSI_B_DP1 24 GND
7 GND 25 I2C1_SCL
8 CSI_B_CLK_N 26 I2C1_SDA
9 CSI_B_CLK_P 27 N/C
10 GND 28 BUF_PLT_RST_1.8_R_N
11 CSI_B_DN0 29 N/C
12 CSI_B_DP0 30 GND
13 CSI_B_DN3 31 N/C
14 CSI_B_DP3 32 +1.2V
15 GND 33 GND
16 GND 34 GPP_S1
17 +2.8V 35 GPP_S2
18 GND 36 GPP_S3
Jumpers and Headers Setting Guide
Top:
1 2 3
1
1
CPU_FAN1
SATA_PWR1
SPEAKER1
DDR4_A1 (Support DDR4 Only)
1
HD_AUDIO1
Industrial
35
SBC-260
USB 3.2 Gen2:
34
T: USB3_2
B: USB3_1
T: DP
33
B: HDMI
LAN1
32
SIM1
31
LAN2
M2_B1
1
1
1
1 1
JGPIO1 1
PWR_COM2
BUZZ2
1
PWR_COM1
PANEL1
1
USB2_4_5 USB2_6_7
1
30 29 28 27 26 25
7 : Panel Power Select (LCD_VCC) (PNL_PWR1)
1-2 : +3V (Default)
1
2-3 : +5V
3-4 : +5V
4
4-5 : +12V
8 : Backlight Volume Control (BLT_VOL1)
1 2
Pin
1
2
9 10
3
4
5
6
7
9 : Backlight Power Select
4 1
(LCD_BLT_VCC) (BKT_PWR1)
1-2 : LCD_BLT_VCC: +5V (Default)
2-3 : LCD_BLT_VCC: +12V
4-5 : LCD_BLT_VCC: DC_IN
4 1
10 : Inverter Power Control Wafer (BLT_PWR1)
Pin
1
2
3
4
5
1 7
6
11 : CON_LBKLT_CTL Voltage Level
(BLT_PWM2)
1-2 : 3V Level (Default)
2-3 : 5V Level
12 : Brightness Control Mode (BLT_PWM1)
36
1
1-2 : From eDP PWM to CON_LBKLT_CTL
2-3 : From LVDS PWM to CON_LBKLT_CTL
• Please set to 1-2 when adjusting brightness by Brightness Control bar under OS.
•
Please set to 2-3 when adjusting brightness by BLT_VOL1.
4 5 6 7
1 1 1
MIPI1
SATA3_0
1
1
1
1
BLT_PWM2
1
1
1
BLT_PWM1
1
BIOS
Chip
1
M2_M1
1
M2_E1
1
1 1
COM1 COM3
1
1
1
CI1
1 1
1 1 1
COM2 COM4
DACC1 SIO_AT1 CLRMOS2
24 23 22 21
20
Signal Name
GPP_E7
GPP_E3
PWRDN
BRIGHTNESS_UP
BRIGHTNESS_DW
GND
GND
Signal Name
GND
GND
BL CTL
BL EN
LCD_BLT_VCC
LCD_BLT_VCC
(Default)
Bottom:
8
9
10
11
12
13
14
15
16
17
18
1
19
ESPI1
37
13 : LVDS Panel Connector (LVDS1)
Pin Signal Name
1
1 LCD_VCC
3 +3.3V
5 N/A LVDS_A_DATA0# 6
7 LVDS_A_DATA0
9 LVDS_A_DATA1# LVDS_A_DATA1 10
5 11 GND LVDS_A_DATA2# 12
13 LVDS_A_DATA2
15 LVDS_A_DATA3# LVDS_A_DATA3 16
17 GND
19 LVDS_A_CLK
1
21 LVDS_B_DATA0# LVDS_B_DATA0 22
23 GND LVDS_B_DATA1# 24
25 LVDS_B_DATA1
27 LVDS_B_DATA2# LVDS_B_DATA2 28
7
29 DPLVDD_EN LVDS_B_DATA3# 30
31 LVDS_B_DATA3
33 LVDS_B_CLK#
35 GND CON_LBKLT_EN 36
37 CON_LBKLT_CTL LCD_BLT_VCC
39 LCD_BLT_VCC
1
* eDP by pass mode pin definition:
Pin Signal Name
5
1 LCD_VCC
3 N/A
5 N/A
7 N/A
9 EDP_TX1#
11 GND
1
13 EDP_TX0
15 N/A
17 GND
19 EDP_AUXP
6
21 N/A
23 GND
25 N/A
27 N/A
29 DPLVDD_EN
31 N/A
33 N/A
1 3
35 GND CON_LBKLT_EN 36
37 CON_LBKLT_CTL LCD_BLT_VCC
39 LCD_BLT_VCC
1 3
BUZZ1
36
Signal Name Pin
2 1
LCD_VCC 2
N/A 4
GND 8
GND 14
40 39
LVDS_A_CLK# 18
GND 20
GND 26
NC 32
LVDS_B_CLK 34
38
LCD_BLT_VCC 40
Signal Name Pin
LCD_VCC 2
N/A 4
N/A 6
GND 8
EDP_TX1 10
EDP_TX0# 12
GND 14
N/A 16
EDP_AUXN 18
GND 20
N/A 22
N/A 24
GND 26
N/A 28
N/A 30
GND 32
N/A 34
38
LCD_BLT_VCC 40