Sony AIT-SDX550 Product Specifications Manual page 49

5.25" model
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(1) after a hard reset condition;
(2) after a BUS DEVICE RESET message and;
(3) after a power cycle.
In addition, a SCSI device may initiate a WDTR message exchange whenever it is appropriate to negotiate a new
transfer width agreement. SCSI devices that are capable of wide data transfers (greater than eight bits) shall not
respond to a WDTR with a MESSAGE REJECT message.
The WDTR message exchange establishes an agreement between two SCSI devices on the width of the data path
to be used for DATA phase transfers between the two devices. This agreement applies to DATA IN and DATA IN
and DATA OUT phases only. All other information transfer phases shall use an eight-bit data path.
If a SCSI device implements both wide data transfer option and synchronous data transfer option, then it shall
negotiate the wide data transfer agreement prior to negotiating the synchronous data transfer agreement. If a
synchronous data transfer agreement is in effect, then a SCSI device that accepts a WDTR message shall reset the
synchronous agreement to asynchronous mode.
The transfer width is two to the transfer width exponent bytes wide. The transfer width that is established applies to
an logical units on both SCSI devices. Valid transfer widths are 8 bits (m=00h) ,and 16 bits (m=01h). Values of m=02
and greater are reserved.
The originating SCSI device (the SCSI device that sends the first of the pair of WDTR messages)sets its transfer
width value to maximum data path width it elects to accommodate. If the responding SCSI device can also
accommodate this transfer width, it returns the same value in its WDTR message. If it requires a smaller transfer
width, it substitutes the smaller value in its WDTR message. The successful completion of an exchange of WDTR
messages implies an agreement as follows:
Responding device WDTR response
a) Non-ZERO transfer width
b) Transfer width equal to ZERO
c) MESSAGE REJECT message
If the initiator recognizes that negotiation is required, it asserts the ATN signal and sends a WDTR message to begin
the negotiating process. After successfully completing the MESSAGE OUT phase, the target shall respond with the
proper WDTR message. If an abnormal condition prevents the target from returning an appropriate response, both
devices shall go to eight-bit data transfer mode for data transfers between the two devices.
Following target response (1)above, the implied agreement for wide data transfers shall be considered to be negated
by both the initiator and the target if it the initiator asserts ATN and the first message out is either MESSAGE PARITY
ERROR or MESSAGE REJECT. In this case, both devices shall go to eight-bit data transfer mode for data transfers
between the two devices. For the MESSAGE PARITY ERROR case, the implied agreement shall be reinstated if a
re-transmittal of the second of the pair of messages is successfully accomplished. After a vendor-specific number of
retry attempts (greater than ZERO),if the target receives a MESSAGE PARITY ERROR message, it shall terminate
the retry activity. This may be done either by changing to any other information transfer phase and transferring at
least on byte of information or by going to the BUS FREE phase. The initiator shall accept such action as aborting the
negotiation and both devices shall go to eight -bit data transfer mode for data transfers between the two devices.
The implied transfer width agreement shall remain in effect until a BUS DEVICE RESET message is received, until a
hard reset condition occurs, or until one of the two SCSI devices elects to modify the agreement. The default data
transfer width is eight-bit data transfer mode. The default data transfer mode is entered at power on m, after a BUS
DEVICE RESET message, or after a hard reset condition.
SONY AIT-2 Turbo drive SDX-550V series Ver.1.0
Implied agreement
Each device transmits and receives data with a transfer width
equal to the responding SCSI device's transfer width.
Eight-bit data transfer
Eight-bit data transfer
5.SCSI Interface
5-7

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