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Intersil HSP45116-DB User Manual

Daughter board
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HSP45116 Daughter Board
The HSP45116-DB is a daughter board designed to mate
with the HSP-EVAL for rapid evaluation and prototyping of
the HSP45116 Numerically Controlled Oscillator Modulator.
Together, the board set provides a mechanism to evaluate
HSP45116 operation using IBM PC
As shown in Figure 1, the HSP45116-DB maps the input,
output, and control signals of the HSP45116 to three 50 pin
headers. These headers mate with connectors on board the
HSP-EVAL to interface the HSP45116's various I/O and
control signals with the HSP-EVAL's data busses. This
interface establishes a path for PC
of the HSP45116-DB via the HSP-EVAL.
TM
An IBM PC
based software package is supplied which
controls operation to the HSP45116-DB/HSP-EVAL board
set. The software package provides the user with a DOS
command line interface and graphical user interface for
daughter board I/O and control. Since the software supports
data acquisition from the HSP45116, software based signal
analysis may be used to quantify part performance.
The degree of control exerted by the software varies
depending upon the clock supplied to the HSP45116-DB. If
a high speed clock is supplied via the HSP-EVAL's on board
oscillator or external clock pin, the software can be used to
HSP45116 Daughter Board
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Elcodis.com
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USER'S MANUAL
TM
based I/O and control.
TM
based I/O and control
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
May 1999
exert real time control. If a software controlled clock is
provided, the HSP45116-DB can be driven with a user
defined data set, while storing results back to the PC for later
analysis.
The HSP45116-DB is a 6 layer printed circuit board which
comes populated with one HSP45116GC-25. The PC based
software required to control the daughter board via the
HSP-EVAL is also provided.
Features
• Designed for Use with HSP-EVAL
• Access to HSP45116s Input, Output, and Control Signals
Through Three 50 Pin Headers
• HSP45116 Control Signal States May be Set Through
Hardware Configuration or Software
• Two Separate Software Packages for Daughter Board I/O
and Control
• High Speed I/O Supported
Applications
• PC Based Performance Analysis of HSP45116 When
Used with HSP-EVAL
http://www.intersil.com or 407-727-9207
HSP45116-DB
File Number 3367.3
©
|
Copyright
Intersil Corporation 1999
IBM PC™ is trademark of IBM Corporation.

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Summary of Contents for Intersil HSP45116-DB

  • Page 1 HSP-EVAL for rapid evaluation and prototyping of analysis. the HSP45116 Numerically Controlled Oscillator Modulator. The HSP45116-DB is a 6 layer printed circuit board which Together, the board set provides a mechanism to evaluate comes populated with one HSP45116GC-25. The PC based HSP45116 operation using IBM PC based I/O and control.

  • Page 2: Getting Started

    Proper alignment requires that the J1, J2, and The distribution diskette contains a program called J3 headers on the HSP45116-DB mate with the J1, J2, and INSTALL.EXE which installs the NCOM-SOFT software onto J3 connectors on the HSP-EVAL. A moderate amount of force the target hard disk.
  • Page 3 HSP45116-DB TABLE 1. OVERLAY OF DEFAULT JUMPER CONFIGURATION ONTO THE SIGNAL MAPPING FOR THE J3 CONTROL HEARDER AND THE CONFIGURATION JUMPER FIELDS A AND B JA SIGNAL SA SIGNAL J3A SIGNAL J3B SIGNAL SB SIGNAL JB SIGNAL NUMBER MNEMONIC MNEMONIC...

  • Page 4: System Test

    Control Panel software. through the HSP45116-DB, and store the output to a file. The output file is then compared, using the DOS command COMP, to a file containing a set of vectors generated by a properly functioning board set.
  • Page 5 HSP45116-DB HSP45116-DB CONTROL PANEL CLOCK SELECT FILE I/O SELECT MANUAL CLK √ √ INPUT FILE: INPUT.DAT PORT CLK √ OSC. CLK OUTPUT FILE: OUTPUT.DAT EXTERNAL CLKA CONTROL SIGNALS (RINO-15) 7FFF 0000 (RO0-15) HSP45116 0 ENPHREG NCOM (IMINO-15) 0000 0000 (IO0-15)
  • Page 6 files which can be used as an input data with the Clock Select jumper position in the HSP-EVAL’s J4 source or an output data sink for the HSP45116-DB. If file jumper field. If either Manual CLK or Port CLK are specified...

  • Page 7: Command Line Interface

    HEXADECIMAL VALUE 16-BIT Loads the specified Hex value into the HSP-EVAL Register (Input Register #2) driv- ing the Real Input bus (RIN0-15) Of The HSP45116-DB. See Note 3. HEXADECIMAL VALUE 16-BIT Loads The Specified Hex Value Into The HSP-EVAL Register (Input Register #1) driving the imaginary Input Bus (IMIN0-15) Of The HSP45116-DB.

  • Page 8: Signal Headers

    CTL0-15 bus as in the default configuration shown in Table 1. 3. If the complex input buses of the HSP45116-DB are to be driven by the HSP-EVAL’s Input Registers 1 and 2, their outputs must be enabled by placing jumpers in the OE_BUS1 and OE_BUS2 positions of the J4 jumper field on the HSP-EVAL.
  • Page 9 HSP45116-DB TABLE 3. SIGNAL ASSIGNMENTS FOR 50 POSITION INPUT TABLE 4. SIGNAL ASSIGNMENTS FOR 50 POSITION OUT- CONNECTOR J1 PUT CONNECTOR J2 J1A SIGNAL J1B SIGNAL J2A SIGNAL J2B SIGNAL NUMBER MNEMONIC MNEMONIC NUMBER MNEMONIC MNEMONIC N.C. RIN0 RIN1 RIN2...

  • Page 10: Data File Structures

    The ‘n’ on the 7th line of the header should be replaced by the number of complex samples in the file. Following the The HSP45116-DB is shipped from the factory with the header, the complex samples are listed one per row with the default jumper configuration shown by the overlay of heavy...
  • Page 11 HSP45116-DB Downloaded from Elcodis.com electronic components distributor...
  • Page 12 HSP45116-DB Downloaded from Elcodis.com electronic components distributor...
  • Page 13 Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.