Dim Code Checkpoints - eMachines EL1852G Service Manual

Checkpoint
52
60
75
78
7A
7C
84
85
87
8C
8D
8E
90
A0
A1
A2
A4
A7
A8
A9
AA
AB
AC
B1
00
61-70

DIM Code Checkpoints

The Device Initialization Manager (DIM) gets control at various times during BIOS POST to initialize different
system busses. The following table describes the main checkpoints where the DIM module is accessed.
Checkpoint
2A
EL1852 Service Guide
Description
Updates CMOS memory size from memory found in memory test. Allocates memory for
Extended BIOS Data Area from base memory. Programming the memory hole or any kind
of implementation that needs an adjustment in system RAM size if needed.
Initializes NUM-LOCK status and programs the KBD typematic rate.
Initialize Int-13 and prepare for IPL detection.
Initializes IPL devices controlled by BIOS and option ROMs.
Initializes remaining option ROMs.
Generate and write contents of ESCD in NVRam.
Log errors encountered during POST.
Display errors to the user and gets the user response for error.
Execute BIOS setup if needed / requested. Check boot password if installed.
Late POST initialization of chipset registers.
Build ACPI tables (if ACPI is supported)
Program the peripheral parameters. Enable/Disable NMI as selected.
Late POST initialization of system management interrupt.
Check boot password if installed.
Clean-up work needed before booting to OS.
Takes care of runtime image preparation for different BIOS modules. Fill the free area in
F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the
runtime language module. Disables the system configuration display if needed.
Initialize runtime language module. Display boot option popup menu.
Displays the system configuration screen if enabled. Initialize the CPU's before boot,
which includes the programming of the MTRR's.
Prepare CPU for OS boot including final MTRR values.
Wait for user input at config display if needed.
Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the ADM module.
Prepare BBS for Int 19 boot.
End of POST initialization of chipset registers.
Save system context for ACPI.
Passes control to OS Loader (typically INT19h).
OEM POST Error. This range is reserved for chipset vendors and system manufacturers.
The error associated with this value may be different from one platform to the next.
Description
Initialize different buses and perform the following functions: Reset, Detect, and Disable
(function 0); Static Device Initialization (function 1); Boot Output Device Initialization
(function 2). Function 0 disables all device nodes, PCI devices, and PnP ISA cards. It also
assigns PCI bus numbers. Function 1 initializes all static devices that include manual
configured onboard peripherals, memory and I/O decode windows in PCI-PCI bridges,
and noncompliant PCI devices. Static resources are also reserved. Function 2 searches
for and initializes any PnP, PCI, or AGP video devices.
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