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2 Product Overview 2 Product Overview 2.1 Product Introduction Fibocom FG101-NA series modules support Cat 6, Cat 12, and Cat 13 three network levels, and support CA network architecture. FG101-NA integrates Baseband, Memory, PMIC, Transceiver, PA and other core devices, supporting long-distance communication modes of FDD-LTE, TDD-LTE and WCDMA.
3 Pin Definition 3 Pin Definition 3.1 Pin Distribution The FG101-NA series module uses LGA packaging and have 299 pins in total. The following figure shows a top perspective view of the pin distribution. Figure 2. Pin Distribution The pin details on the left and upper side of the module are shown in the following figure.
3 Pin Definition Figure 4. Pin Details (2) 3.2 Pin Function The pin functions of FG101-NA series module are shown in the following table. Table 6. LGA Pin Function Description Power Reset Pin Name Pin Description Number Domain Status Module reset signal, active low RESET_N 1.8V...
The operating limit voltage is the normal operating voltage range of the module, beyond which the module will have an abnormal performance. 4.1.1 Absolute Limit Voltage The following table describes the absolute limit voltage ranges of FG101-NA series module. Table 9. Absolute Limit Voltage Range Parameter...
1.85/2.928 USB_VBUS 5.25 4.2 Power Consumption The power consumption of FG101-NA series module measured under 3.8 V power supply is described in the following table. For AT commands used for USB sleep Fibocom_FG101_AT Commands User Manual and wakeup, see . The USB used in the power consumption test is USB3.0.
5 Functional Interface 5 Functional Interface 5.1 Power Supply The following table describes the power interface of FG101-NA series module. Table 15. Power Interface Pin Name Pin Number Description Module RF power supply, VBAT_RF 85, 86, 87, 88 3.4V–4.3V, 3.8V...
In this document, VBAT includes VBAT_RF and VBAT_BB. The supply voltage of VBAT_RF and VBAT_BB must be consistent. 5.1.1 Power Input The FG101-NA series module is powered on through the VBAT pin. The following figure shows the recommended power supply design. Figure 5. Recommended Power Supply Design The filter capacitor design of power supply is shown in the following table.
(< 50 mA) circuits. FG101-NA series module outputs a 2.7V level through the VDD_RF_2V8 for the external RF or other circuits to use, with an output current < 50 mA. Leave the signal floating if not used.
Keep the pin floating when it is not used. 5.3 Network Status Indication Interface FG101-NA series module provides three network status indication interfaces. The default pin 170 is the network status indicator pin. The pin definitions are shown in the following table.
Figure 17. (U)SIM Card Slot with Card Detection Signal 5.4.3 (U)SIM Card Hot Plug The FG101-NA series module supports the (U)SIM card hot plug function. The module detects the status of the USIM1_DET/USIM2_DET pin to determine whether a (U)SIM card is inserted or removed.
GND all around. 5.6 UART Interface and Application FG101-NA series module supports 3-channel UART interface, with the maximum baud rate of 921600 bps and the default baud rate of 115200 bps. The following table describes pins of UART interface.
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Pins marked with * are reserved functions or under development. The UART interface level of FG101-NA series module is 1.8 V, if the customer host system level is 3.3 V or other, a level conversion circuit needs to be added to the UART signal, and the UART level conversion reference circuit is shown in the following figure.
5.7 ADC Interface FG101-NA series module supports two-channel ADC interface with minimum accuracy of ± 10mV. Run the AT+MMAD command to read the voltage value of ADC interface. The voltage range of ADC interface is 0V to 1.8V.
I2C_SCL I2C clock signal 5.9 PCM Digital Audio Interface The FG101-NA series module provides a digital audio interface for communication with external codec and other digital audio devices. 5.9.1 PCM Interface Definition PCM interface signals include transmission clock PCM_CLK, frame synchronization signal PCM_SYNC, and input and output PCM_IN/PCM_OUT.
Figure 20. Reference Circuit of the PCM Interface External codec Chip 5.10 SDIO Interface Physical FG101-NA series module supports one SDIO interface. The standard is as follows: Layer Specification SDIO Card Specification version 3.0 and version 3.0.
Module flight mode control (internal pulled up by W_DISABLE_N default) FG101-NA series module supports two ways as described in the following table to enter flight mode: Table 35. Ways for Module to Enter Flight Mode Send AT+GTFMODE=1 to turn on the hardware control flight mode function;...
1575.42 ± 1.023 GLONASS L1 1602.5625 ± 4 1561.098 ± 2.046 Galileo 1559–1592 6.2 Transmitting Power The following table describes the RF output power of FG101-NA series module. Table 39. Output Power Band Minimum Value Maximum Value WCDMA < -50dBm 23.5dBm ±...
The above data is an average value obtained by testing some samples at 25°C. 6.5 Antenna indicators The antenna requirements for FG101-NA module are described in the following table. Table 43. Module Antenna Requirements FG101-NA series module main antenna requirements VSWR: ≤ 2 Input power: > 28 dBm Input impedance: 50Ω WCDMA/LTE Antenna gain: <...
In addition to ESD in packaging, customers should consider the recommended circuit of the interface design in the document during module application. The following table describes the ESD discharge range allowed by the FG101-NA series module. Table 46. Allowed ESD Discharge Range...
9 Structural Specifications 9 Structural Specifications 9.1 Product Appearance The appearance of the FG101-NA series module is shown in the following figure. Figure 37. Product Appearance 9.2 Structural Dimensions The structural dimension of the FG101-NA series module is shown in the following figure.
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