Texas Instruments THS56XEVM User Manual
  1. Manuals
  2. Brands
  3. Texas Instruments Manuals
  4. Motherboard
  5. THS56XEVM
  6. User manual
Texas Instruments THS56XEVM User Manual

Texas Instruments THS56XEVM User Manual

For the ths5641a/51 a/61 a/71 a 8 ,10-, 12-, and 14-bit commsdac digital-to-analog converters
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
THS56X1EVM for the
THS5641A/51A/61A/71A 8 ,10 ,
12 , and 14 Bit CommsDAC
Digital to Analog Converters
User's Guide
February 2001
AAP High-Speed Data Converters
SLAU032B

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the THS56XEVM and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Texas Instruments THS56XEVM

Summary of Contents for Texas Instruments THS56XEVM

  • Page 1 THS56X1EVM for the THS5641A/51A/61A/71A 8 ,10 , 12 , and 14 Bit CommsDAC Digital to Analog Converters User’s Guide February 2001 AAP High-Speed Data Converters SLAU032B...
  • Page 2 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.

  • Page 3: Read This First

    Related Documentation From Texas Instruments Preface Read This First About This Manual This user’s guide describes the characteristics, operation, and use of the THS56X1 evaluation module (EVM). How to Use This Manual This document contains the following chapters: Chapter 1 – EVM Overview Chapter 2 –...
  • Page 4 Trademarks CE/FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules.

  • Page 5: Table Of Contents

    Running Title—Attribute Reference Contents EVM Overview ..............System Block Diagram .
  • Page 6 Contents Control Modes ..............SLEEP Input Pin .
  • Page 7 Running Title—Attribute Reference Figures 1–1 THS56X1 EVM Block Diagram ..........1–2 Mating of Connectors on the THS56X1 EVM to the Tektronix HFS9009 Pattern Generator...
  • Page 8 Running Title—Attribute Reference Tables 1–1 Package Styles Available ............1–2 General ADC Features .

  • Page 9: Evm Overview

    Chapter 1 EVM Overview This user’s guide describes the characteristics, operation, and use of the THS56X1 evaluation module (EVM). The THS56X1 EVM can be connected to the TMS320C542/TMS320C54xx DSP and controlled by very user friendly software—TI’s Code Composer Development Environment, or to a pattern generator.

  • Page 10: System Block Diagram

    System Block Diagram 1.1 System Block Diagram The THS56X1 EVM provides a practical platform for evaluating the following devices: THS5671A 14-bit resolution, 100 MSPS CommsDAC THS5661A 12-bit resolution, 100 MSPS CommsDAC TLV5651A 10-bit resolution, 100 MSPS CommsDAC THS5641A 8-bit resolution, 100 MSPS CommsDAC The EVM supports the SOIC (DW) package style, but all devices are available in other packages (see Table 1–1).

  • Page 11: Commsdac System Description

    CommsDAC System Description Figure 1–1 comprises two input buffers, CommsDAC control logic, a CommsDAC, an external Vref, a transformer, and an operational amplifier(op amp). This illustration provides a general overview of the EVM. It is not meant to replace the circuit diagram, but to give a brief indication of the features and functions available.

  • Page 12: Control/Interface

    EVM Operating Modes 1.2.2 Control/Interface The control signals can be derived from either a DSK/microprocessor or from a dedicated GND and 3-V to 5-V supply connected to J3. The signals from either source are similar. The decision regarding which host system to use is left to of the user.

  • Page 13: C542/C54Xx Dsk/Microprocessor Mode

    Power and Cabling Requirements 1.3.3 Analog Output The techniques used in a design of this type are different from those used in lower speed DACs. Single-ended analog output is derived from the THS56X1A CommsDAC differential outputs IOUT1 and IOUT2 via a 1:1 RF transformer.

  • Page 14: Pattern Generator Mode

    Printed Circuit Assembly as Part of a System Figure 1–2. Mating of Connectors on the THS56X1 EVM to the Tektronix HFS9009 Pattern Generator Tektronix HFS9009 Pattern Generator SMA to Ribbon Cable Adapter THS56X1 EVM...

  • Page 15: Mating Of Connectors On The Ths56X1 Evm To The Sma-Ribbon Cable Adapter

    Printed Circuit Assembly as Part of a System Figure 1–3. Mating of Connectors on the THS56X1 EVM to the SMA–Ribbon Cable Adapter SMA to Ribbon Cable Adapter THS56X1 EVM EVM Overview...

  • Page 16: Mating Of Connectors On The C542Dsk To The C542 Dskplus

    Printed Circuit Assembly as Part of a System Figure 1–4. Mating of Connectors on the C542DSK to the C542 DSKplus Power Supply Cable THS56X1 EVM Detail A C54X Adapter Board Red conductor indicates pin 1 TMS320C54X DSKplus Detail B V notch CAUTION indicates pin 1 Connector and ribbon cable...

  • Page 17: Commsdac Output Configurations

    Printed Circuit Assembly Options Available 1.5.3 CommsDAC Output Configurations The THS56X1A CommsDAC output can be configured as single-ended outputs or as a differential output (see also THS5661A, 12-bit, 100MSPS, CommsDAC data sheet SLAS247A). Differential output configuration requires IOUT1 and IOUT2 to feed directly into SMA connectors, J8 and J9 (see Figure 1-5).
  • Page 18 1-10...

  • Page 19: Getting Started

    Chapter 2 Getting Started This chapter describes the physical characteristics and PCB layout of the EVM, and lists the components used on the module. Topic Page Physical Description ......... . Parts List .

  • Page 20: Physical Description

    Physical Description 2.1 Physical Description The PWB is constructed in four layers as shown in the following illustrations. The dimensions of the PWB are 4.25 in × 3.375 in (107.95 mm × 85.73 mm). See Figure 2–1. Figure 2–1. PWB Layers Component Side Tracking Layer Layer 1...

  • Page 21: Board Layout, Layer

    Physical Description Figure 2–3. Board Layout, Layer 2 Figure 2–4. Board Layout, Layer 3 Getting Started...

  • Page 22: Board Layout, Layer

    Physical Description Figure 2–5. Board Layout, Layer 4 Figure 2–6. Silk Screen...
  • Page 23 Parts List 2.2 Parts List This table lists the parts required for the THS56X1 EVM assembly. REFERENCE DESIGNATION PART NUMBER DESCRIPTION MANUFACTURER Ceramic 1 µF, 10 V, C1, C22, C31 1206ZC105KAT2A X7R, 10% 6.3 V, 4.7 µF, tantalum C18, C19, C28, C35 ECSTOJY475 Panasonic 6.3 V, 10 µF, tantalum...
  • Page 24 Parts List REFERENCE DESIGNATION PART NUMBER DESCRIPTION MANUFACTURER 1206 1206 Chip resistor, 10K, 1/4 W, 1% 1206 1206 Chip resistor, 100K, 1/4 W, 1% 1206 1206 Chip resistor, TBD, 1/4 W, 1% R26, R27, R28, R30 1206 1206 Chip resistor, 750K, 1/4 W, 1% T1-1T-KK81 RF Transformer,...

  • Page 25: User Configurations

    Chapter 3 User Configurations This chapter describes the user-definable options. Topic Page Schematic Diagram ......... . . User Options .

  • Page 26: Schematic Diagram

    Schematic Diagram 3.1 Schematic Diagram Figure 3–1 illustrates the EVM schematic.
  • Page 27 Schematic Diagram User Configurations...

  • Page 28: Jumper Functions

    User Options 3.2 User Options The PCA ships in a state that enables immediate evaluation of the digital-to-analog converter (DAC). However, you can reconfigure various options through hardware. This chapter discusses these options to ensure that any reconfiguration is conducted properly. The hardware on the PCA falls into various groups: 18 jumpers 4 wire links...

  • Page 29: Reconfiguration Hardware Location

    Analog/Digital Supply Voltages Figure 3–2. Reconfiguration Hardware Location 3.3 Analog/Digital Supply Voltages Two options supply power to the digital section of the EVM: 3.3-V or 5-V digital DVDD (for 5-V operation replace U1 and U2 with SN74HC245) 5-V only analog AVDD Configure the power supply voltages in accordance with the following tables.

  • Page 30: Digital Input Options

    Digital Input Configurations 3.4 Digital Input Configurations Various options are available to configure the analog inputs. This section describes these options, along with the jumper settings required. The two alternatives for the analog inputs are given in the following table. Table 3–3.

  • Page 31: Shipping Condition Of Jumpers W1 Through W9

    Generating a Voltage Reference Figure 3–3. Direct Connect Jumper Configuration for THS56X1A 5 VA EXTLO D[2–15] D[0–15] D[0–13] IOUT 1 EXTIO 50 Ω BIASJ J1 Pin 33 MODE CLKOUT IOUT 2 50 Ω DAC Clock Table 3–4. Shipping Condition of Jumpers W1 Through W9 Jumper Pins 1 and 2 Pins 2 and 3...

  • Page 32: Jumper Configuration For Internal Reference Voltage

    Generating a Voltage Reference Table 3–5. Jumper Configuration for Internal Reference Jumper Pins 1 and 2 Pins 2 and 3 VREF setting Jumper installed Jumper not installed Jumper not installed Figure 3–4. Jumper Configuration for Internal Reference Voltage THS56x1A 5 VA EXTLO EXTIO BIAS...

  • Page 33: Jumper Configuration For External Reference

    External Clock Figure 3–5. Jumper Configuration for External Reference 5 VA EXTLO EXTIO BIAS Onboard External Reference Voltage Under no circumstance should the external reference voltage exceed 1.25 V. 3.6 External Clock The CommsDAC requires an external clock. Two possible external sources for the clock are required by the CommsDAC.
  • Page 34 External Clock 3.6.2 C542/C54xxDSK/Microprocessor Mode A DSP subsystem such as the C54X DSPplus/C5410 DSK provides some advantage when evaluating the DAC performance with signals, such as W-CDMA data points and arbitrary generated waveform data points. The clock frequency, via the ’C54x DSK adapter board, is set at 40 MHz. 3.6.3 Analog Output Circuits The 1:1 RF transformer is used for impedance matching, dc isolation and...

  • Page 35: Connector Pin And Function Assignments

    Connector Pin and Function Assignments 3.7 Connector Pin and Function Assignments This section details the pinouts and functions for all user connectors. Table 3–7. Connector Pin and Function Assignments Reference Designator Function Data bits 0 through 13 and CLKOUT input J2, J4 Supplies power to the EVM Input control signals used to create EVM chip select...

  • Page 36: J1 Parallel Data Connector

    Connector Pin and Function Assignments Table 3–11. J1 Parallel Data Connector Pin Number Function Pin Number Function DSP_15 (MSB) Ground (digital) DSP_14 Ground (digital) DSP_13 Ground (digital) DSP_12 Ground (digital) DSP_11 Ground (digital) DSP_10 Ground (digital) DSP_09 Ground (digital) DSP_08 Ground (digital) DSP_07 Ground (digital)

  • Page 37: Control Modes

    Chapter 4 Control Modes The SLEEP, MODE, EXTLO, EXTIO and BIASJ pins of the THS5671A/ THS5661A/THS5651A/THS5641A control various DAC features and functions. This section describes the function of these pins. Topic Page SLEEP Input Pin ..........MODE Input Pin .
  • Page 38 SLEEP Input Pin 4.1 SLEEP Input Pin The SLEEP pin is used to power down the device. It is an active high asynchronous power-down input. The device has an internal pulldown resistor. So for normal operations of the device, it is not necessary to tie the pin to DGND.
  • Page 39 Chapter 5 Software The code listed in this chaper runs on the 40 MHz C542 DSKplus. It allows you to output a 220 kHz sinewave from the DAC, while the DAC is being clocked at 40 MHz. Running the code on a 100 MHz C542 DSP or the C5410 DSP will give output sinewave speeds up to 2 MHz.
  • Page 40 : input for THS56x1 EVM using the ’C542 DSKplus board * AUTHOR : AAP Application Group, L. Philipose, Dallas : CREATED 1999(C) BY TEXAS INSTRUMENTS INCORPORATED. * REFERENCE : TMS320C54x User’s Guide, TI 1997 : Data Aquisation Circuits, TI 1999 ************************************************************************** .title...
  • Page 41 .word 01500h .word 02A00h .word 04580h .word 05E80h .sect ”.text” _sinewave: _MAIN: START: INITIALIZATION: * copy interrupt routine, which are uncritical by the EVM to the IRQ table loca- tion: = #1; =#00200h; repeat(#3h) data(0084h) = *AR7+ ; copy the NMI vector = #00240h repeat(#35) data(00C0h)

Table of Contents