Address Map And Special Registers; Base Address And Interrupt Level (Irq) - Quatech QSC-200 User Manual

4 Address Map and Special Registers

This chapter explains how the four UARTs and special registers are addressed, as well as
the layout of those registers. This material will be of interest to programmers writing driver
software for the QSC-200/300.

4.1 Base Address and Interrupt Level (IRQ)

The base address and IRQ used by the QSC-200/300 are determined by the BIOS or
operating system. Each serial port uses 8 consecutive I/O locations. The four ports reside in a
single block of I/O space in eight byte increments, for a total of 32 contiguous bytes, as shown in
Figure 7.
Channel
All four serial ports share the same IRQ. The QSC-200/300 signals a hardware interrupt
when any port requires service. The interrupt signal is maintained until no port requires service.
Interrupts are level-sensitive on the PCI bus.
The base address and IRQ are automatically detected by the device drivers Quatech
supplies for various operating systems. For cases where no device driver is available, such as for
operation under DOS, Quatech supplies the "QTPCI" DOS software utility for manually
determining the resources used. See section 7.1.1 for details.
Quatech QSC-200/300 Users Manual
Port 1 Base Address + 0
Port 2 Base Address + 8
Port 3 Base Address + 16
Port 4 Base Address + 24
Figure 7 --- Port Address Map
I/O Address Range
to Base Address + 7
to Base Address + 15
to Base Address + 23
to Base Address + 31
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