Infineon XMC7000 Series Manual
  1. Manuals
  2. Brands
  3. Infineon Manuals
  4. Microcontrollers
  5. XMC7000 Series
  6. Manual

Infineon XMC7000 Series Manual

Flash accessing procedure
Hide thumbs Also See for XMC7000 Series:
Table of Contents

Advertisement

Quick Links

Download this manual
AN234280
XMC7000 MCU: Flash accessing procedure

About this document

Scope and purpose
This application note describes flash accessing procedure and provides examples on how to use this function
for XMC7000 family MCU. The document also explains the features of eCT40 flash memory, block diagram,
sector configuration, and code flash rewriting examples using the SROM API operation.
Intended audience
This document is intended for anyone who uses the flash function of the XMC7000 family.
Associated part family
XMC7000 family of
XMC™ industrial microcontrollers.
Application note
Please read the sections "Important notice" and "Warnings" at the end of this document
002-34280 Rev. *A
www.infineon.com
2023-05-31

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the XMC7000 Series and is the answer not in the manual?

Questions and answers

Related Manuals for Infineon XMC7000 Series

Summary of Contents for Infineon XMC7000 Series

  • Page 1: About This Document

    This document is intended for anyone who uses the flash function of the XMC7000 family. Associated part family XMC7000 family of XMC™ industrial microcontrollers. Application note Please read the sections “Important notice” and “Warnings” at the end of this document 002-34280 Rev. *A www.infineon.com 2023-05-31...

  • Page 2: Table Of Contents

    XMC7000 MCU: Flash accessing procedure Table of contents Table of contents About this document ........................1 Table of contents ..........................2 Introduction .......................... 3 Overview of flash memory ...................... 4 Features ..............................4 Block diagram ............................4 Sector configuration ..........................6 2.3.1 Bank mode and remap functionality ....................

  • Page 3: Introduction

    XMC7000 MCU: Flash accessing procedure Introduction Introduction This application note describes the flash accessing procedure for XMC7000 family MCU. XMC7000 family has code flash, work flash, and supervisory flash. Code flash is part of the flash memory used to store user programs, while work flash is used to store critical nonvolatile data or parameters.

  • Page 4: Overview Of Flash Memory

    XMC7000 MCU: Flash accessing procedure Overview of flash memory Overview of flash memory Features XMC7000 family devices use eCT flash memory which is portioned into code, work, and supervisory-flash regions. This application note targets only code and work flash regions. Table 1 lists the features of both code flash and work flash for XMC7200 series.
  • Page 5 XMC7000 MCU: Flash accessing procedure Overview of flash memory Cortex- Memory Cortex-M0+ Crypto Peripheral M7_0/M7_1 Fast Infrastructure Slow Infrastructure (Interface for Fast Clock Domain) (Interface for Slow Clock Domain) AHB Lite Bus Interface ROM Controller Arbiter Component Performs Priority- Arbiter based Arbitration Based on Master Supervisory ROM...

  • Page 6: Sector Configuration

    XMC7000 MCU: Flash accessing procedure Overview of flash memory Sector configuration Figure 2 shows the flash sector configuration for XMC7200 series. The XMC7200 series has 8128 KB (32-KB large sectors) and 256 KB (8-KB small sectors) of code flash with an additional work flash. Work flash has been optimized to be able to reprogram the data several times more than the code flash.
  • Page 7 XMC7000 MCU: Flash accessing procedure Overview of flash memory Logical Bank 0 Logical Bank 0 Logical Bank 1 Logical Bank 1 Singe Bank Mode Singe Bank Mode Dual Bank Mode Dual Bank Mode Mapping A Mapping A Mapping B Mapping B 0x1780 8000 0x1780 8000 0x1780 8000...

  • Page 8: Flash Rewriting

    XMC7000 MCU: Flash accessing procedure Flash rewriting Flash rewriting This section shows an example of Flash Erase All operation and Program Row operation that program the 64-bit data to code flash. In the XMC7000 family, there is no automatic algorithm and command sequencer embedded, but flash operations are implemented as system calls.
  • Page 9 XMC7000 MCU: Flash accessing procedure Flash rewriting vector table (addresses 0x00000040 and 0x00000044 respectively). This can be achieved by copying values from the SROM vector table to the user vector table during runtime if it is in RAM; otherwise, hard-coded values need to be used and reconfirmed if target MCU or revision changes.
  • Page 10 XMC7000 MCU: Flash accessing procedure Flash rewriting Here is the pseudo code for the interrupt configuration needed for system call for Case /* IRQ2 handler function for IPC Interrupt structure 0 interrupt. This is the system call manager function void Sys_Call_Manager() /* Trigger IRQ0 in Software by writing to ISPR register */ CM0P_SCS_ISPR = 1;...

  • Page 11: Flash Erase All Procedure

    XMC7000 MCU: Flash accessing procedure Flash rewriting Flash Erase All procedure Figure 5 shows Flash Erase All procedure from the CM7 CPU core with the usage of the IPC and CM0+ IRQ0 handler. This example shows the erase operation for the entire code flash, but does not include the supervisory region and work flash.

  • Page 12: Assessing The Result Of The Erase All Operation From Cm0

    XMC7000 MCU: Flash accessing procedure Flash rewriting 3.2.4 Assessing the result of the Erase All operation from CM0+ Detect the release interrupt from the IPC2 interrupt structure [By CM7 user code]. 2. Read the status from SRAM_SCRATCH_ADDR (&SramScratch[0]), to get the API operation result [By CM7 user code].

  • Page 13: Program Row Procedure

    XMC7000 MCU: Flash accessing procedure Flash rewriting Program Row procedure Figure 6 shows setting example of the Flash Program Row operation by CM7 and the behavior of IPC and CM0+ IRQ0 handler. This example shows the write operation with 64-bit test data into the code flash. The address of the code flash to be written is 0x1000_0000.

  • Page 14: Executing The Program Row Api In Cm0+ Irq0

    XMC7000 MCU: Flash accessing procedure Flash rewriting 3.3.3 Executing the Program Row API in CM0+ IRQ0 Detect the API notification event via the IPC0 interrupt structure [By CM0+ user code]. Read SRAM_SCRATCH_ADDR (&SramScratch[0]) from IPC1_DATA0 [By CM0+ IRQ0 handler]. Read the opcode(0x06), program data size, target address to be programmed, program data from SRAM [By CM0+ IRQ0 handler].
  • Page 15 XMC7000 MCU: Flash accessing procedure Flash rewriting Start of program row operation Enable Main flash embedded operations (FLASHC_FM_CTL_ECT-> unMAIN_FLASH_SAFETY.stcField.u1MA INFLASHWRITEENABLE=1) Allocate 4 word as SRAM scratch region (uint32_t SramScratch[4];) Allocate 2 word as data buffer to be written into the code flash (uint32_t data[2];) IPC1 Channel Structure IPC0 Interrupt Structure...

  • Page 16: Flash Rewriting Using Dual-Bank Approach

    XMC7000 MCU: Flash accessing procedure Flash rewriting using dual-bank approach Flash rewriting using dual-bank approach This section shows an example of flash rewriting using flash dual-bank approach to enable the OTA functionality. Concept In XMC7000 family MCUs, the OTA functionality is handled by two separate registers. The Flash Main Bank Mode register is to configure flash bank mode between single and dual banks.

  • Page 17: Flash Reprogramming

    XMC7000 MCU: Flash accessing procedure Flash rewriting using dual-bank approach 3 Dual Bank 1 After Reset 2 CM0+ User Program 4 Work Flash Check in 5 CM7 User Configuration in Operation after Boot Up CM0+ User Program Program Operation CM0+ User Program Remap Remap Remap...

  • Page 18: Starting A New Cm7 User Program Code

    XMC7000 MCU: Flash accessing procedure Flash rewriting using dual-bank approach 1 Reception of Firmware Update Request 2 Firmware Operation Update Bank 1 Bank 0 Remap Remap Work Flash Parameter Parameter Code Flash (SMS) User Program 2 Blank for CM7 Code Flash (ES) User Program Blank for CM0+...

  • Page 19: Flash Rewriting Procedure Using Dual-Bank Mode And Remap Function

    XMC7000 MCU: Flash accessing procedure Flash rewriting using dual-bank approach 2 Dual Bank Configuration 3 Jump to RAM 1 After Reset 4 Remap and Switch Code 5 Start New CM7 and Read from Work Flash Code Flash Bank in RAM Code User Program Remap Remap...
  • Page 20 XMC7000 MCU: Flash accessing procedure Flash rewriting using dual-bank approach CM0+ Start Set Write Enable for CodeFlash/WorkFLASH Set CodeFLASH Bank Mode to Dual Bank Mode Initialization Disable CM0+ Flash Cache Invalidate Flash Cache Buffer Erase Invalidate Flash Cache Buffer Read Remap parameter WorkFLASH SA0= 0xAAAA_AAAA? from WorkFLASH SA0 Is WorkFLASH SA0=...

  • Page 21: Work Flash Reading Procedure

    XMC7000 MCU: Flash accessing procedure Work flash reading procedure Work flash reading procedure In XMC7000 family, work flash can be read via different CPU cores, but only one CPU core is assigned for non- correctable ECC error handling. When an ECC error occurs, the CPU core handling the error must inform the other CPU cores about the error.
  • Page 22 XMC7000 MCU: Flash accessing procedure Work flash reading procedure 7. CPU reads the data from the destination address after DMA transfer completed. If a non-correctable ECC error occurred in the work flash, each CPU will be able to detect it as a bus error using DMA.

  • Page 23: Glossary

    XMC7000 MCU: Flash accessing procedure Glossary Glossary Table 4 Glossary Advanced High-performance Bus Advanced eXtensible Interface Embedded Charge-Trap Error correcting code Over-the-air Random access memory SRAM Static random-access memory P-DMA Peripheral DMA M-DMA Memory DMA Inter-processer communication Interrupt request Debug Access port Read-while-write Application note 002-34280 Rev.

  • Page 24: References

    XMC7000 MCU: Flash accessing procedure References References Contact Technical Support to obtain more XMC7000 family reference documents. Device datasheet XMC7100 series 32-bit Arm® Cortex®-M7 microcontroller datasheet − XMC7200 series 32-bit Arm® Cortex®-M7 microcontroller datasheet − Devices architecture TRM XMC7000 MCU architecture technical reference manual −...

  • Page 25: Revision History

    XMC7000 MCU: Flash accessing procedure Revision history Revision history Document Date Description of changes revision 2022-01-19 New application note 2023-05-31 Updated References. Updated links throughout the document. Application note 002-34280 Rev. *A 2023-05-31...

  • Page 26: Disclaimer

    Infineon Technologies hereby Infineon Technologies’ products may not be used in disclaims any and all warranties and liabilities of any applications where a failure of the product or any any kind (including without limitation warranties of © 2023 Infineon Technologies AG.

Table of Contents