SECTION 578-200-100
indication triggers
the one-shot
multivibrators,
causing a positive-going
pulse (-14 volts to +14
volts) to appear at the output and energize
the
relay for the duration of the multivibrator
time-
out period.
This is accomplished
as follows.
3. 24
Input amplifier
Ql is normally on (col-
lector at 0 volt).
When an error
is de-
tected,
the negative-going
pulse ( +6 volts to 0
volt) at the output of the PE gate causes
Ql to
become nonconductive.
3.25
Stages Q2 and Q3 formaone-shot
multi-
vibrator
whose timeout
period is con-
trolled
by R8, Cl,
and C2.
Transistor
Q2 is
normally
held off and Q3 is normally on.
When
Ql is cutoff by the PE gate output, Q2 is brought
into conduction and a negative-going
transition
is produced at the collector.
This transition
is
capacitively
coupled to the base of Q3 by C 1 and
C2 or C2 alone.
Stage Q3 is turned off and the
multivibrator
begins its timeout..
The capacitors
or capacitor charge until the base of Q3 becomes
positive enough to allow it to conduct again.
With
both capacitors
in the circuit
(factory wiring),
the timeout period of one-shot Q2-Q3 is approxi-
mately 500 milliseconds.
Removing strap A so
that only C2 is in the circuit
reduces the timeout
period to approximately
1 ms.
An intermediate
timeout period can be obtained by removing strap
A and connecting a capacitor with a value between
those of Cl and C2 across
terminals
27 and 28.
3. 26
Stages Q4 and Q5 also form a one-shot
multivibrator.
Controlled
by R14, C3,
and C4, its operation
is the same as for one-
shot Q2-Q3.
Stage Q4 reacts
the same as Q2,
and Q5 the same as Q3; all four stages switch at
the same time initially.
With both capacitors
in
the circuit
(factory wiring),
the timeout period
ofone-shot
Q4-Q5 is approximately
250 ms. Re-
moving strap B so that only C4 is in the circuit
reduces the timeout period to approximately
3. 5
ms.
An intermediate
timeout period can be ob-
tained
by removing
strap
B and connecting
a
capacitor
with a value between those of C3 and
C4 across
terminals
29 and 30.
For example,
with a 5 microfarad
(MFD) capacitor
the time-
out will be approximately
65 ms, and with the 2
MFD capacitor
{furnished with versions
of the
SAll0 having an indicator assembly) the timeout
will be approximately
31 ms.
3. 27
The timeout
period of one-shot
Q4-Q5,
T2, controls
the duration
of the output
pulse and the time that the relay is energized.
If the timeout period of one-shot Q2-Q3, Tl, is
longer than T2, further
triggering
of one-shot
Page 12
Q4-Q5 will be inhibited· for a time equal to the
difference
of the two periods.
This timing is
shown in Figure 5, Case A. Since Tl is longer
than T2, the minimum interval in which repetitive
errors will be indicated is Tl and errors will not
be indicated during the inhibit period of Tl minus
T2.
If Tl is shorter
than T2, as shown in Fig-
ure 5, Case B, there is no inhibit period and the
minimum interval
in which repetitive errors will
be indicated is T2. These relationships,
and the
strapping
required
to obtain them, are summa-
rized in Table B.
3. 28
Despite the wide variety of timing options
available
for special applications,
most
SAl 10 installations
use either the factory wiring
or have straps A and B removed, with or without
an added capacitor.
The factory wiring provides
a 250 ms output pulse for generating
a line break
(110 or 150 baud) or pulse on reverse
channel
(1050 baud and higher
speeds) wit;1 a 250 ms
inhibit before another error
indication is made
to accommodate
the response
of the reverse
channel.
(Normally
the sender alarms
on de-
tecting the line break or reverse
channel pulse,
so additional error indications are not required.)
This wiring is also used when a lamp is to be
lighted on the first error
which remains
on until
reset.
Removing
straps
A and B to eliminate
the error indication inhibit and reduce the output
pulse to 3. 5 ms allows a high speed counter to
record errors at the character
rate at 1050 baud.
Adding a capacitor
between terminals
29 and 30
with straps A and B removed allows a low speed
counter
to record
errors
at the character
rate
at 110 or 150 baud and error bursts at 1050 baud.
Note: The low speed counter supplied with the
SAll0
BB,
SAll0 CB,
and SAll0 EB re-
quires
a minimum
make
duration
(output
pulse) of 30 ms and a minimum break dura-
tion (delay between output pulses) of 30 ms.
With a 2 microfarad
capacitor added between
terminals
29 and 30, the 31 ms output pulse
leaves a remainder
of the character
duration
at 150 baud of about 36 ms, permitting
con-
secutive errors
to. be registered
at both 110
and 150 baud.
3. 29
Whatever
its duration,
the output pulse
from the collector
of Q5 is passed
to
relay driver
Q6, either
directly
or through a
latching circuit.
This relay driver is normally
held off (collector
at +14 volts) by a low signal
from Q5 or the latching circuit.
When the output
pulse is developed,
Q6 turns on (collector
at
0 volt) for the duration
of the output pulse.
Normally relay Kl is energized
while Q6 is on,
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