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Ublox JODY-W3 Series System Integration Manual

Host-based modules with wi-fi 6 and bluetooth 5.3
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JODY-W3 series
Host-based modules with Wi-Fi 6 and Bluetooth 5.3
System integration manual
Abstract
This document describes the system integration of JODY-W3 series modules. These host-based
modules support concurrent dual-band Wi-Fi 802.11n/ac/ax and Bluetooth® 5.3 and are designed
for both simultaneous and independent operations. JODY-W3 modules include an integrated
MAC/baseband processor and RF front-end components of automotive grade.
UBX-19011209 - R09
C1-Public
www.u-blox.com

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  • Page 1 Host-based modules with Wi-Fi 6 and Bluetooth 5.3 System integration manual Abstract This document describes the system integration of JODY-W3 series modules. These host-based modules support concurrent dual-band Wi-Fi 802.11n/ac/ax and Bluetooth® 5.3 and are designed for both simultaneous and independent operations. JODY-W3 modules include an integrated MAC/baseband processor and RF front-end components of automotive grade.

  • Page 2: Document Information

    JODY-W3 series - System integration manual Document information Title JODY-W3 series Subtitle Host-based modules with Wi-Fi 6 and Bluetooth 5.3 Document type System integration manual Document number UBX-19011209 Revision and date 4-May-2023 Disclosure Restriction C1-Public Product status Corresponding content status...

  • Page 3: Table Of Contents

    JODY-W3 series - System integration manual Contents Document information ..........................2 Contents ............................... 3 System description ..........................7 1.1 Overview ................................ 7 1.2 Module architecture ........................... 7 1.2.1 Block diagrams ............................ 8 1.3 Pin definition ..............................9 1.3.1 Pin attributes ............................9 1.3.2 Pin assignment ..........................
  • Page 4 JODY-W3 series - System integration manual 2.4 Data communication interfaces ......................29 2.4.1 PCI Express ............................29 2.4.2 SDIO 3.0 .............................. 30 2.4.3 High-speed UART interface ......................31 2.5 Other interfaces and notes ........................32 2.6 General high-speed layout guidelines ....................32 2.6.1 General considerations for schematic design and PCB floor-planning .........
  • Page 5 JODY-W3 series - System integration manual 3.9.2 Bluetooth TX power levels ....................... 57 3.9.3 Adaptivity configuration (energy detection) ................58 3.9.4 OFDMA resource unit TX power configuration for 802.11ax ..........59 3.10 Driver debugging ............................60 3.10.1 Compile-time debug options ......................60 3.10.2 Runtime debug options ........................
  • Page 6 JODY-W3 series - System integration manual B.2.3 802.11ax OFDMA power limits ...................... 79 Glossary .............................. 80 Related documents ..........................82 Revision history ............................83 Contact ............................... 83 UBX-19011209 - R09 Contents Page 6 of 83 C1-Public...

  • Page 7: System Description

    JODY-W377-00B Table 1: Supported configurations of the JODY-W3 module series ☞ Some JODY-W3 series modules use a dedicated LTE coexistence band-pass filter in the 2.4 GHz Wi-Fi path. Module variants equipped with an LTE coexistence filter, as shown in Table 1, are recommended for designs with co-located LTE devices operating in bands 7, 38, 40, or 41.

  • Page 8: Block Diagrams

    JODY-W3 series - System integration manual 1.2.1 Block diagrams Figure 1 shows the block diagram for the JODY-W354 and JODY-W374 module variants. Figure 1: JODY-W354 and JODY-W374 block diagram Figure 2 shows the block diagram for the JODY-W377 module variant.

  • Page 9: Pin Definition

    JODY-W3 series - System integration manual 1.3 Pin definition 1.3.1 Pin attributes • Function: Pin function • Pin name: Name of the package pin or terminal • Pin number: Package pin numbers associated with each signal • Power: Voltage domain that powers the pin •...

  • Page 10: Pin Assignment

    JODY-W3 series - System integration manual 1.3.2 Pin assignment Figure 3: JODY-W3 series module pin assignments (top view) 1.3.3 Pin list Function Pin name Pin no. Power Type Description Active Power down Power 3.3 V power supply 1.8 V or 3.3 V VIO supply ground 1.8 V power supply...
  • Page 11 JODY-W3 series - System integration manual Function Pin name Pin no. Power Type Description Active Power down SD_D1 SDIO data line bit [1] Tristate SD_D2 SDIO data line bit [2] Tristate SD_D3 SDIO data line bit [3] Tristate Bluetooth BT_UART_TX BT UART output signal.
  • Page 12 JODY-W3 series - System integration manual Function Pin name Pin no. Power Type Description Active Power down Same function as pin 10. GPIO_13 GPIO[13] / UART_DTRn Drive high GPIO_24 GPIO[24] Tristate GPIO_25 GPIO[25] Drive high GPIO_26 GPIO[26] Tristate GPIO_27 GPIO[27]...

  • Page 13: Supply Interfaces

    The current consumed through the VIO and 1V8, and 3V3 pins by JODY-W3 series modules can vary by several orders of magnitude depending on the operation mode and state. Current consumption can...

  • Page 14: Regulated Dc Power Supply

    1.4.2 Regulated DC power supply JODY-W3 series modules must be powered by a regulated DC power supply, such as an LDO or SMPS. The appropriate type for your design depends on the main power source of the application. SMPS is the ideal choice when the source of the main supply has a significantly higher voltage than that of the JODY-W3 series module.

  • Page 15: Reset

    PD# in the event of any abnormal module behavior. The PD# pin may be connected to a reset signal from the host. JODY-W3 series modules are reset to a default operating state by any of the following events: •...

  • Page 16: Wake-Up Signals

    JODY-W3 series - System integration manual 1.5.4 Wake-up signals JODY-W3 series modules provides module-to-host wake-up signals, used to exit the host from any sleep mode over Wi-Fi or Bluetooth. Wake-up signals are powered by the VIO voltage domain. Name Description...

  • Page 17: Power States

    JODY-W3 series - System integration manual 1.5.6 Power states JODY-W3 series modules have several operation states. The power states and general guidelines for Wi-Fi and Bluetooth operations are defined in Table General status Power state Description Power-down Not Powered 3V3, VIO, and 1V8 supplies not present or below the operating range: module is switched off.

  • Page 18: Pcie Interface

    JODY-W3 series - System integration manual Name Description Remarks SD_CLK SDIO Clock input SD_CMD SDIO Command line External PU required SD_D0 SDIO Data line bit [0] External PU required SD_D1 SDIO Data line bit [1] External PU required SD_D2 SDIO Data line bit [2]...

  • Page 19: High-Speed Uart Interface

    High-Speed UART signals are powered by the VIO voltage domain. 1.6.4 PCM/I2S - Audio interface JODY-W3 series modules support a bi-directional 4-wire PCM digital audio interface for digital audio communication with external digital audio devices like an audio codec. The PCM interface supports: •...

  • Page 20: Coexistence Interfaces

    JODY-W3 series - System integration manual 1.7 Coexistence interfaces 1.7.1 Pin name Pin number Function Pin type Description GPIO_2 EXT_STATE External radio state input signal External radio traffic direction (Tx/Rx): • 1: TX • 0: RX GPIO_17 EXT_GNT External radio grant output signal...

  • Page 21: Approved Antenna Designs

    1.9 Other remarks 1.9.1 Unused pins JODY-W3 series modules have unconnected (NC) pins that are reserved for future use. These pins must be left unconnected on the application board. 1.9.2 GPIO usage GPIOs are used to connect the JODY-W3 series module to various external devices.

  • Page 22: Design-In

    JODY-W3 series - System integration manual Design-in Follow the design guidelines stated in this chapter to optimize the integration of JODY-W3 series modules in the final application board. 2.1 Overview Although every application circuit must be properly designed, there are several points that require special attention during application design.

  • Page 23: Antenna Design

    JODY-W3 series - System integration manual 2.2.1 Antenna design At the start the application design phase, when the mechanical design and the physical dimensions of the board are still under analysis/decision, the antenna integration shall be considered. This since the compliance and subsequent certification of the RF design depends heavily on the radiating performance of the antennas.
  • Page 24 JODY-W3 series - System integration manual Item Requirements Remarks Return Loss S11 < -10 dB (VSWR < 2:1) The Return loss or the S11, as the VSWR, recommended refers to the amount of reflected power, measuring how well the primary antenna S11 <...
  • Page 25 JODY-W3 series - System integration manual 2.2.1.1 RF connector design If an external antenna is required, the designer should consider using a proper RF connector. It is the responsibility of the designer to verify the compatibility between plugs and receptacles used in the design.
  • Page 26 JODY-W3 series - System integration manual Figure 6: U.FL connector layout example with pi-matching components placed on top of microstrip 2.2.1.2 Integrated antenna design If integrated antennas are used, the transmission line is terminated by the antennas themselves. Follow the guidelines given below: •...
  • Page 27 JODY-W3 series - System integration manual • Stripline. A track separated by dielectric material and sandwiched between two parallel ground planes. The most common configuration for a printed circuit board (PCB) is the coplanar microstrip, as shown Figure Figure 7: Transmission line trace design Follow these recommendations to design a 50 ...

  • Page 28: Supply Interfaces

    3V3, 1V8 and VIO pins with proper DC power supplies that comply with the voltage supply requirements summarized in Table Good connection of the JODY-W3 series module power supply pins with DC supply source is required for accurate RF performance and schematic guidelines are summarized below: •...

  • Page 29: Data Communication Interfaces

    2.4.1 PCI Express The PCI Express (Peripheral Component Interconnect Express) bus of JODY-W3 series modules support PCIe v2.0 connectivity at transfer rates up to 5 Gbaud. PCIe differential clock and data pairs are a controlled impedance bus, and the main parameters considered for the track impedance...

  • Page 30: Sdio 3.0

    2.4.2 SDIO 3.0 The SDIO 3.0 bus supported in JODY-W3 series modules can support a clock frequency up to 208 MHz. Consequently, the modules demand special care to guarantee signal integrity requirements and to minimize EMI issues. The signals should be routed with a single ended impedance of 50 Ω.

  • Page 31: High-Speed Uart Interface

    CMD, DAT[0:3] Center to center between signals Table 20: SDIO bus requirements ☞ JODY-W3 series supports only 1.8 V SDIO signal voltage. A level shifter is needed to connect to a 3.3 V host controller. 2.4.3 High-speed UART interface The high-speed UART interface for the JODY-W3 complies with the HCI UART Transport layer and...

  • Page 32: Other Interfaces And Notes

    JODY-W3 series - System integration manual 19200 230400 1382400 2764800 Table 22: Possible baud rates for the UART interface After a hardware reset, the UART interface is configured for 115 200 baud without flow control. When the firmware is loaded, the baud rate is set to 3 000 000 baud and flow control is enabled. A host...

  • Page 33: Layout And Manufacturing

    ⚠ The heat dissipation during continuous transmission at maximum power can significantly raise the temperature of the application baseboard below JODY-W3 series modules. Avoid placing temperature sensitive devices close to the module and provide adequate grounding to transfer the generated heat to the PCB.
  • Page 34 Figure 11 shows the pin layout for the JODY-W3 series module. The proposed land pattern layout reflects the pin layout of the module. Both Solder Mask Defined (SMD) and Non Solder Mask Defined (NSMD) pins can be used, however the following considerations apply: •...

  • Page 35: Thermal Guidelines

    2.8 Thermal guidelines JODY-W3 series modules are designed to operate from -40 °C to +85 °C at an ambient temperature inside the enclosure box. The board will generate heat during high loads that must be dissipated to sustain the lifetime of the components.

  • Page 36: Esd Guidelines

    The ESD ratings for JODY-W3 module pins are defined in the JODY-W3 series data sheet, UBX-19010615 [1]. The designer must implement proper measures to protect from ESD events on any pin that may be exposed to the end user in compliance with the following European regulations: •...

  • Page 37: Design-In Checklists

    See list.  Power supply design complies with the voltage supply requirements in Table 3 and the power supply requirements described in the JODY-W3 series data sheet [1].  The power sequence is properly implemented. See Power-up sequence. ...

  • Page 38: Software

    JODY-W3 series - System integration manual Software The instructions in this chapter describe how to set up the JODY-W3 series module on a Linux operating system. Including several examples, it also describes how the reference driver packages are compiled and deployed in the target system.

  • Page 39: Proprietary Drivers

    Core-i3 5.4.115 Table 24: Tested Linux kernel versions for the JODY-W3 series modules reference drivers The supplied software package supports Linux kernel from 2.6.32 to 6.0.0. As long as there is no change in the kernel API, this package can also support the latest kernel versions. If there are any changes to the kernel APIs you choose to use, you must make the necessary changes using patches.

  • Page 40: Software Architecture

    Table 25: Components of the NXP driver package 3.4 Software architecture From the software point of view, JODY-W3 series modules contain only on-board OTP memory with calibration parameters and MAC addresses. Consequently, the modules require a host-side driver and device firmware to run.

  • Page 41: Bluetooth Driver

    Bluetooth driver The standard Bluetooth protocol stack in Linux is provided by BlueZ. The reference driver package provides a Bluetooth driver for the JODY-W3 series module that performs the following functions: • Data and command forwarding between upper protocol stack layers and the firmware •...

  • Page 42: Compiling The Drivers

    3.5.1 Prerequisites The appropriate Wi-Fi driver for use with JODY-W3 series modules depends on the PCI or MMC/SDIO subsystem of the Linux kernel. Consequently, support for the respective subsystem and the correct host controller driver must be enabled in the target kernel configuration of the system.

  • Page 43: Firmware

    Yocto recipes to learn more about the install path and names of the files. 3.6.1 Firmware JODY-W3 series modules can be configured to download the firmware in two different modes: • Parallel mode: Dedicated interfaces are used to download the firmware for Wi-Fi and Bluetooth radios separately.

  • Page 44: Additional Software Requirements

    Build recipe system of the host system image. Patches Used to fix bugs in ublox-distributed drivers seen either locally or reported by the vendor. Calibration files, provided by u-blox, used while loading the driver. These files store the tuning Calibration files parameters needed for RF parts present in the module, like the crystal.

  • Page 45: Runtime Usage

    3.8.1 Device detection Prior to loading the drivers, make sure that the JODY-W3 series module is detected by the host system. ☞ PD# must not be asserted to enable the JODY-W3 series module.
  • Page 46 JODY-W3 series - System integration manual The following log example shows the firmware request and loading operation of the PCIe driver. 187.830477] mlan: loading out-of-tree module taints kernel. 187.995594] wlan: Loading MWLAN driver 188.000731] wlan_pcie 0000:01:00.0: enabling device (0000 -> 0002) 188.007113] Attach moal handle ops, card interface type: 0x206...

  • Page 47: Verification

    ☞ The example uses as the serial device port. Replace it with the port to which the /dev/ttyUSB0 JODY-W3 series UART interface is connected on the host system. 3.8.3 Verification 3.8.3.1 Firmware version The version of the loaded Wi-Fi driver and firmware can be verified using the following command: $ mlanutl mlan0 version Version string received: PCIE9098-17.68.1.p38-MXM4X17222.P1-GPL-(FP68)

  • Page 48: Assigning Mac Addresses

    Table 30: Available Wi-Fi network interfaces ☞ JODY-W3 series modules include two radios – 2.4 and 5 GHz – and two MACs for concurrent dual Wi-Fi use cases, where Wi-Fi interfaces from MAC 1 and 2 operate concurrently in different bands.

  • Page 49: Antenna Configuration

    JODY-W3 series - System integration manual In the following example, the MAC addresses of the Wi-Fi interfaces have been changed in the file. The changes have been implemented to meet the application requirements so init_cfg.conf that each interface is assigned with a unique MAC address to avoid conflicts. The addresses are assigned to the uap0 and muap0 interfaces.
  • Page 50 JODY-W3 series - System integration manual vht_oper_chwidth=1 vht_oper_centr_freq_seg0_idx=42 ieee80211ax=1 he_su_beamformer=1 he_bss_color=1 he_oper_chwidth=1 he_oper_centr_freq_seg0_idx=42 eapol_version=1 wpa_key_mgmt=WPA-PSK wpa=2 rsn_pairwise=CCMP wpa_passphrase=1234567890 The access point is started with the command: hostapd hostapd_ax5g.conf -B ☞ Use the command with the options to generate detailed log files for debugging purpose.
  • Page 51 JODY-W3 series - System integration manual The following commands set up the 5 GHz 802.11ax access point and the security mechanisms: uaputl -i uap0 bss_stop uaputl -i uap0 htstreamcfg 0x22 uaputl -i uap0 sys_cfg_rates 0x8c 0x98 0xb0 0x12 0x24 0x48 0x60 0x6c...

  • Page 52: Station Mode

    JODY-W3 series - System integration manual # he capability id # HE MAC capability info 00 00 00 82 00 08 # HE PHY capability info, first byte 04: 80MHz, 02: 20MHz 04 70 7e c9 fd 01 a0 0e 03 3d 00...

  • Page 53: Bluetooth Usage

    JODY-W3 series - System integration manual 3.8.8 Bluetooth usage ☞ Once the Bluetooth drivers are loaded for the UART interface, it is necessary to bind the serial BlueZ interface to the Bluetooth stack. For this, use the tool in the package.

  • Page 54: Configuration Of Tx Power Limits And Energy Detection

    JODY-W3 series - System integration manual 3.9 Configuration of TX power limits and energy detection 3.9.1 Wi-Fi power table The Wi-Fi TX power table defines the transmit power levels for the Wi-Fi radio. The power levels are based on regulatory compliance, IEEE 802.11 requirements, and product design constraints. The TX power table can be adjusted to achieve the highest transmit power level for each Wi-Fi channel, bandwidth, and modulation within the constraints defined by the certification.
  • Page 55 JODY-W3 series - System integration manual The parameters inside txpwrlimit_cfg.conf are described in Table Parameter Description TLVType Internal parameter set to 0x189. Do not change this value. TLVStartFreq • Starting frequency of the band for this channel • 2407, 2414 or 2400 for 2.4 GHz •...
  • Page 56 JODY-W3 series - System integration manual Modulation Mode Bandwidth Description Notes on re-use for other modes Group [MHz] 802.11ax HE_20_QAM256 (MCS 8,9) HE_20_QAM1024 (MCS 10,11) HE_40_QAM1024 (MCS 10,11) HE_80_QAM1024 (MCS 10,11) 802.11ax (2x2) HE2_20_QAM256 (MCS 8,9) HE2_20_QAM1024 (MCS 10,11) HE2_40_QAM1024 (MCS 10,11)

  • Page 57: Bluetooth Tx Power Levels

    JODY-W3 series - System integration manual 3.9.1.1 Applying the TX power limit configuration The TX power configuration file txpwrlimit_cfg.conf must first be converted to a binary format before the Wi-Fi driver can use it. The following example command uses the mlanutl tool to create the binary file txpower_US.bin from the configuration file:...

  • Page 58: Adaptivity Configuration (Energy Detection)

    JODY-W3 series - System integration manual 3.9.3 Adaptivity configuration (energy detection) JODY-W3 modules support the adaptivity requirements (energy detection) from EN 300 328 and EN 301 893 for Wi-Fi. The Energy Detect mechanism must be explicitly enabled after the startup of the module, and correct detection threshold values must be configured.

  • Page 59: Ofdma Resource Unit Tx Power Configuration For 802.11Ax

    JODY-W3 series - System integration manual 3.9.4 OFDMA resource unit TX power configuration for 802.11ax This section describes how to configure the TX Power levels for UL-OFDMA that apply only for the 802.11ax modes. On the NXP chipset, the TX Power level of each resource unit (RU) type can be configured using the rutxpower_limit.conf config file.

  • Page 60: Driver Debugging

    JODY-W3 series - System integration manual 3.10 Driver debugging Driver debugging is provided through the kernel print function and the proc file system. Driver printk states are recorded and are retrieved through the proc file system during runtime. command output includes the following debug information files: printk •...

  • Page 61: Handling And Soldering

    JODY-W3 series - System integration manual Handling and soldering ⚠ JODY-W3 series modules are Electrostatic Sensitive Devices that demand the observance of precautions against electrostatic discharge. Failure to observe precautions can result in severe damage to the product. Standard ESD safety practices must be applied.

  • Page 62: Reflow Soldering Process

    JODY-W3 series - System integration manual 4.3 Reflow soldering process JODY-W3 series modules are surface mounted devices supplied on a multi-layer FR4-type PCB with gold-plated connection pads. The modules are produced in a lead-free process using lead-free soldering paste. The thickness of solder resist between the host PCB top side and the bottom side of JODY-W3 series modules must be considered for the soldering process.

  • Page 63: Cleaning

    JODY-W3 series - System integration manual 4.3.1 Cleaning Cleaning the modules is not recommended. Residues underneath the modules cannot be easily removed with a washing process. • Cleaning with water will lead to capillary effects where water is absorbed in the gap between the baseboard and the module.

  • Page 64: Regulatory Compliance

    This section contains instructions on the process needed for an integrator when including the JODY-W3 module into an end-product. • Any deviation from the process described may cause the JODY-W3 series module not to comply with the regulatory authorizations of the module and thus void the user's authority to operate the equipment.

  • Page 65: Compliance With The Rohs Directive

    5.2.2 Compliance with the RoHS directive JODY-W3 series modules comply with the Directive 2011/65/EU (EU RoHS 2) and its amendment Directive (EU) 2015/863 (EU RoHS 3). 5.3 Great Britain regulatory compliance For information about the regulatory compliance of JODY-W3 series modules against requirements and provisions in Great Britain, see also the JODY-W3 UKCA Declaration of Conformity [17].

  • Page 66: United States Compliance Statement (Fcc)

    FCC rules part 15 thus void the user's authority to operate the equipment. The model name is identical to the ordering code. For details, see the JODY-W3 series data sheet [1]. UBX-19011209 - R09...

  • Page 67: Canada Compliance Statement (Ised)

    For FCC end poduct labeling requirements, see End product labeling requirements. 5.4.2 Canada compliance statement (ISED) JODY-W3 series modules are certified for use in accordance with the Canada Innovation, Science and Economic Development Canada (ISED) Radio Standards Specification (RSS) RSS-247 Issue 2 and RSS-Gen.

  • Page 68: Referring To The U-Blox Fcc/Ised Certification Id

    ☞ The approval type for all JODY-W3 series variants is a single modular approval. Due to ISED Modular Approval Requirements (Source: RSP-100 Issue 10), any application which includes the module must be approved by the module manufacturer (u-blox). The application manufacturer must provide design data for the review procedure.

  • Page 69: Antenna Requirements

    JODY-W3 series - System integration manual 5.4.5 Antenna requirements In addition to the general requirement to use only authorized antennas, the u-blox grant also requires a separation distance of at least 20 cm from the antenna(s) to all persons. The antenna(s) must not be co-located with any other antenna or transmitter (simultaneous transmission) as well.

  • Page 70: Configuration Control And Software Security Of End-Products

    JODY-W3 series - System integration manual 5.4.6 Configuration control and software security of end-products ☞ “Modular transmitter” hereafter refers to JODY-W354, JODY-W374 (FCC ID XPYJODYW374), and JODY-W377 (FCC ID XPYJODYW377). As the end-product must comply with the requirements addressed by the OET KDB 594280 [15], the host product integrating the JODY-W3 must comply with the following requirements: •...

  • Page 71: Operating Frequencies

    JODY-W3 series - System integration manual 5.4.7 Operating frequencies JODY-W3 802.11b/g/n/ax operation outside the 2412–2462 MHz band is prohibited in the US and Canada and 802.11a/n/ac/ax operation in the 5600–5650 MHz band is prohibited in Canada. Configuration of the module to operate on channels 12–13 and 120–128 must be prevented accordingly.
  • Page 72 JODY-W3 series - System integration manual The label on the JODY-W3 module containing the original FCC/ISED ID acquired by u-blox can be replaced with a new label stating the end-product’s FCC/ISED ID in compliance with the modular labeling requirements of OET KDB 784748.

  • Page 73: Approved Antennas

    JODY-W3 series - System integration manual 5.5 Approved antennas Refer to the JODY-W3 antenna reference design application note [22] for the specifications that must be fulfilled in the end product that uses radio type approval of the JODY-W3 module. The JODY- W3 antenna reference design application note provides PCB layout details and electrical specifications.

  • Page 74: Product Testing

    JODY-W3 series - System integration manual Product testing 6.1 u-blox in-line production testing As part of our focus on high quality products, u-blox maintain stringent quality controls throughout the production process. This means that all units in our manufacturing facilities are fully tested and that any identified defects are carefully analyzed to improve future production quality.

  • Page 75: Oem Manufacturer Production Test

    JODY-W3 series - System integration manual 6.2 OEM manufacturer production test As all u-blox products undergo thorough in-line production testing prior to delivery, OEM manufacturers do not need to repeat any firmware tests or measurements that might otherwise be necessary to confirm RF performance. Testing over analog and digital interfaces is also unnecessary during an OEM production test.

  • Page 76: Appendix

    Appendix A Reference schematic Figure 19: JODY-W3 reference schematic UBX-19011209 - R09 Appendix Page 76 of 83 C1-Public...

  • Page 77: B Wi-Fi Transmit Output Power Limits

    B Wi-Fi transmit output power limits B.1 FCC/ISED regulatory domain Table 39 Table 40 list the maximum allowable conducted output power limits for operation in the FCC/ISED regulatory domains. The output power limits are applicable with an external antenna gain of 2 dBi.

  • Page 78: Wi-Fi Output Power For 5 Ghz Band

    B.1.2 Wi-Fi output power for 5 GHz band TX power [dBm] SISO (1x1) MIMO (2x2) Table 40: FCC / ISED Wi-Fi power table for operation in the 5 GHz band B.1.3 802.11ax OFDMA power limits Worst case OFDMA with 26-tone RU •...

  • Page 79: Red Regulatory Domain

    • 5 GHz FCC (SISO and MIMO): 802.11ax 40/80 MHz channels 36 – 48: 8 dBm 802.11ax 40 MHz channel 102, 802.11ax 80 MHz channel 106: 7 dBm 802.11ax 20/40/80 MHz all other channels: 9 dBm B.2 RED regulatory domain Table 41 Table 42 list the maximum allowable conducted output power limits for operation in the...

  • Page 80: C Glossary

    C Glossary Abbreviation Definition Automotive Electronics Council Access Point Application Programming Interface Automatic Test Equipment Bluetooth Charged Device Model European Conformity Command Line Interface Clear to Send Direct Current Double Data Rate Dynamic Frequency Selection DHCP Dynamic Host Configuration Interface Enhanced Data Rate EEPROM Electrically Erasable Programmable Read-Only Memory...
  • Page 81 Abbreviation Definition Pulse-code modulation Physical layer (of the OSI model) Power Management Unit Radio Frequency RSDB Real Simultaneous Dual Band Request to Send SDIO Secure Digital Input Output Solder Mask Defined SMPS Switching Mode Power Supply Surface-Mount Technology SSID Service Set Identifier Station To be Decided Through-Hole Technology...

  • Page 82: Related Documents

    Related documents JODY-W3 series data sheet, UBX-19010615 Product packaging guide, UBX-14001652 u-blox Limited Use License Agreement, LULA-M IEC EN 61000-4-2 - Electromagnetic compatibility (EMC) - Part 4-2: Testing and measurement techniques – Electrostatic discharge immunity test ETSI EN 301 489-1 - Electromagnetic compatibility and Radio spectrum Matters (ERM);...

  • Page 83: Ubx-19011209 - R09

    Revision history Revision Date Name Comments 5-June-2020 lber, mzes Initial release. 26-Aug-2020 lber, mzes Updated reference schematic in Appendix A. Fixed PCIe signal descriptions in Table 10. 29-Jan-2021 lber, mzes Added professional grade product variants JODY-W374 and JODY-W377. Updated pin list and descriptions in Table 4. Corrected configuration pins in Table 7.

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