ASROCK AD425PV - V1.0 User Manual page 30

DRAM Timing Control
OC Tweaker
DRAM Timing Control
Standard Memory Info : 6-6-6-18-52-6-3-3-3
DRAM tCL
DRAM tRCD
DRAM tRP
DRAM tRAS
DRAM tRFC
DRAM tWR
DRAM tWTR
DRAM tRRD
DRAM tRTP
v02.54 (C) Copyright 1985-2003, American Megatrends, Inc.
DRAM tCL
This controls the number of DRAM clocks for TCL. Min: 3. Max: 7. The
default value is [Auto].
DRAM tRCD
This controls the number of DRAM clocks for TRCD. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRP
This controls the number of DRAM clocks for TRP. Min: 3. Max: 10. The
default value is [Auto].
DRAM tRAS
This controls the number of DRAM clocks for TRAS. Min: 9. Max: 24. The
default value is [Auto].
DRAM tRFC
This controls the number of DRAM clocks for TRFC. Min: 15. Max: 78. The
default value is [Auto].
DRAM tWR
This controls the number of DRAM clocks for TWR. Min: 3. Max: 15. The
default value is [Auto].
DRAM tWTR
This controls the number of DRAM clocks for TWTR. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRRD
This controls the number of DRAM clocks for TRRD. Min: 2. Max: 15. The
default value is [Auto].
DRAM tRTP
This controls the number of DRAM clocks for TRTP. Min: 2. Max: 13. The
default value is [Auto].
3 0 3 0 3 0
3 0 3 0
BIOS SETUP UTILITY
Specifies the CAS
Latency Time.
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
Min = 3
[Auto]
Max = 7
[Auto]
[Auto]
Select Screen Select Screen
[Auto]
Select Item Select Item
+- +- Change Option Change Option
F1 F1 General Help General Help
F9 F9 Load Defaults Load Defaults
F10 F10 Save and Exit Save and Exit
ESC ESC Exit Exit