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2.For single DDR,5372only support 1080i bob mode de-interlacing. (Non-3D de interlace)
3.With single DDR, it is suggested not to support PIP/POP features. Due to DDR Bandwidth
limitation on PIP when single DDR.
MT8291 Application
The MT8291 is highly integrated stereo audio CODEC.The MT8291 performs stereo
analog-to-digital and two digital-to-analog conversions with single-ended analog voltage input and
output. It's up to 24bit serial values at sample rates up to 192kHz.A7:1 stereo input multiplexer and
automatic level control are included. The PGA is available for line inputs and provides
gain/attenuation of 21dB in 0.5 steps.
The two DAC outputs reach 2Vrms at 12V supply, they also include headphone, two Left/Right line
outputs with volume gain/attenuation -127dB to +12dB and digital de-emphasis function. Sampled
data is transmitted by the serial audio interface at rates from 32kHz to 192kHz.For audio clock
application, the MT8291 supports master, slave modes and three data formats in serial interface.
Individual two I2S clock and data supported different sample rates for ADC and DAC parts
simultaneously, then output from DAC1 and DAC2 independently.
CONFIDENTIAL
DO NOT COPY
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Page 7-8
File No. SG-0228
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