Buffers And Control Circuitry; Line Buffer; I/O Buffer - IBM 2780 Reference Manual

Data transmission terminal component description
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4-WIRE LEASED LINE 2400 BPS AND 4800 BPS
DATA SET AND LINE PROPAGATION
(INCLUDES ACKNOWlEDGMENT MESSAGE)
6 BIT--73MS (2400 BPS), 0 MS (4800 BPS)
8 BlT--79MS (2400 BPS), I OMS (4800 BPS)
280
\
\
I
I
\
\
260
240
220
\
\
"
200
180
1\,
"
~
160
,
140
"-
,
\~
~8BlT
~
4800 Bps·
6 A N D 8 B I >
~
2400 BPS
120
100
~
80
10
20
30
40
50
COLUMNS PUNCHED IN CARD
'USE THROUGHPUT FORMULA (FIGURE 7) TO
CALCULATE 6 BIT THROUGHPUT RATE.
60
70
80
See NOTE in Figure 7 and NOTE under
"Multiple-Record Transmission" in the
"Special Features" section of this manual.
Figure 11. IBM 2780 Card Punch Approximate Throughput Rate -- Four-vVire Leased Line
Card jam in the transport
Feed clutch--extra feed cycle
Invalid combination of punches
Punch echo check
Card read/punch not-ready
Operation of the stop key
Hopper empty
Stacker full
Chip box full or not in position
BUFFERS AND CONTROL CIRCUITRY
The control circuitry of the IBM 2780 Data Transmis-
sion Terminal is located in the base of the I/O units
(card read/punch and printer). The control circuitry
contains the electronic circuitry for encoding (genera-
ting) data-link control characters and controlling the
terminal operation. The control unit also provides
two buffers (line and I/O) for the terminal. Using
18
two buffers enables the read, punch, and print opera-
tions to be executed without holding up the communi-
cations line.
Line Buffer
The line buffer is a 400-position, 8-bits-per-position
buffer with two address registers. The line buffer
will store two maximum-length records, the associ-
ated end-of-record character (US, ETB, or ETX),
and the component-select or carriage-control sequence.
NOTE: Although the line buffer contains 400 storage positions, not
all positions are usable unless the Multiple-Record Transmission
special feature is installed (see "Special Features").
I/O Buffer
The I/O buffer is a 200-position, 8-bits-per-position
buffer with one address register. The I/O buffer will

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