Table of Contents
Advertisement
9.
COMMUNICATIONS IN THE NO-PROTOCOL MODE
MELSEC-A
(5) Clearing the receive buffer memory
If and error occurs due to failure of an external device, for example,
while receiving data from an external device in the no-protocol mode.
the data received up to the error may be incorrect or interrupted. To
received up to the error may be incorrect or interrupted. To recover
after an error has occurred it is possible t o cleaa all received data and
initialized the AJ71 C24 buffer memory.
(a) Error detection
The following methods are used to detect errors while data is being
received.
1) Reading the error LED display area
To detect errors the PC CPU can read the LED ONIOFF statuses,
stored at buffer memory address l O l H as transmission error
data.
2) PC input signals
Signals such as READY signals from external devices are con-
nected to the PC CPU as input signals. The PC CPU can detect
errors from the ONfOFF status of these signals.
(b) Clearing receuved data
1) Range of data cleared
All data already received by the AJ71C24 is cleared and the
no-prptocol mode receive buffer memory area is initialized (See
Appendix 4 for details).
2) How to clear received data
Received data is cleared by writing "1" to buffer memory address
IODH using the [TO] instruction.
After clearing received data, the AJ71C24 clears the
"1"
that was
written to buffer memory address IODH.
The received data may be cleared while the receive data read
request signal (Xnl) and received data read completed signal
(Y(n+l)l) are OFF.
Use Xnl and Y ( n + l ) l as an interlock for TO instruction.
,
Clear i n s y o n
I
Received data
clear processing
AJ71 C24
Address
lODn
P C C P U
[TO] instruction
(Program)
(Write "1" to buffer memory address
10th)
Advertisement
Table of Contents
