Abatron bdiGDB ARM7 User Manual
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Abatron bdiGDB ARM7 User Manual

Jtag debug interface for gnu debugger
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GDB
bdi
JTAG debug interface for GNU Debugger
ARM7 / ARM9
User Manual
Manual Version 1.23 for BDI2000
©1997-2011 by Abatron AG

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Summary of Contents for Abatron bdiGDB ARM7

  • Page 1 JTAG debug interface for GNU Debugger ARM7 / ARM9 User Manual Manual Version 1.23 for BDI2000 ©1997-2011 by Abatron AG...

  • Page 2: Table Of Contents

    3.5 Multi-Core Support ......................51 4 Specifications ..........................52 5 Environmental notice........................ 53 6 Declaration of Conformity (CE)....................53 7 Abatron Warranty and Support Terms ..................54 7.1 Hardware ..........................54 7.2 Software ..........................54 7.3 Warranty and Disclaimer ..................... 54 7.4 Limitation of Liability ......................
  • Page 3 GNU Debugger, BDI2000 (ARM7/9/9E) User Manual 7.4 Appendices A Troubleshooting ........................55 B Maintenance ..........................56 C Trademarks ..........................58 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 4: Introduction

    BDI2000 can be updated by the user with a simple Windows / Linux config- uration program. The BDI2000 supports 1.8 – 5.0 Volts target systems (3.0 – 5.0 Volts target systems with Rev. A/B). © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 5: Bdi Configuration

    ERASE 0x04018000 ;erase sector 6 of flash ERASE 0x0401C000 ;erase sector 7 of flash Based on the information in the configuration file, the target is automatically initialized after every re- set. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 6: Installation

    14 - NC 20 - NC The green LED «TRGT» marked light up when target is powered up For BDI MAIN / TARGET A connector signals see table on next page. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 7 The BDI2000 works also with targets which have no dedicated TRST pin. For this kind of targets, the BDI cannot force the target to debug mode immediately after reset. The target always begins execu- tion of application code until the BDI has finished programming the Debug Control Register. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 8: Changing Target Processor Type

    (Rev. A) or via the POWER connector (Rev. B/C). For more information see chapter 2.2.1 «External Power Supply»). To avoid data line conflicts, the BDI2000 must be disconnected from the target system while programming the logic for an other target CPU. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 9: Adaptive Clocking

    For more information about adaptive clocking see ARM documentation. Note: Adaptive clocking is only supported with BDI2000 Rev.B/C and a special target cable. This special cable can be ordered separately from Abatron (p/n 90052). Rev. B/C 20 pin Multi-ICE...
  • Page 10 This output of the BDI2000 connects to the target TMS line. reserved reserved GROUND System Ground RESET System Reset This open-drain output of the BDI2000 is used to reset the target system. reseved reseved GROUND System Ground © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 11: Connecting The Bdi2000 To Power Supply

    The BDI2000 needs to be supplied with 5 Volts (max. 1A) via the BDI OPTION connector (Rev. A) or via POWER connector (Rev. B/C). The available power supply from Abatron (option) or the en- closed power cable can be directly connected. In order to ensure reliable operation of the BDI2000, keep the power supply cable as short as possible.

  • Page 12: Power Supply From Target System

    POWER TX RX 10 BASE-T TRGT MODE TARGET A TARGET B The green LEDs «BDI» and «TRGT» marked light up when target is powered up and the jumper is inserted correctly © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 13: Status Led "Mode

    The BDI is ready for use, the firmware is already loaded. The power supply for the BDI2000 is < 4.75VDC. BLINK The BDI «loader mode» is active (an invalid firmware is loaded or loading firmware is active). © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 14: Connecting The Bdi2000 To Host

    3 - TXD data to host RS232 POWER TX RX 10 BASE-T 4 - NC 5 - GROUND 2000 6 - NC 7 - NC 8 - NC Host 9 - NC RS232 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 15: Ethernet Communication

    When this LED light BLINKS, data is being transmitted through the UTP port of the BDI2000 Receive When this LED light BLINKS, data is being received through the UTP port of the BDI2000 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 16: Installation Of The Configuration Software

    The MAC address is derived from the serial number as follows: MAC: 00-0C-01-xx-xx-xx , repace the xx-xx-xx with the 6 left digits of the serial number Example: SN# 93123457 ==>> 00-0C-01-93-12-34 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 17: Configuration With A Linux / Unix Host

    -d parameter. [root@LINUX_1 bdisetup]# ./bdisetup -u -p/dev/ttyS0 -b57 -aGDB -tARM Connecting to BDI loader Erasing CPLD Programming firmware with ./b20armgd.103 Programming CPLD with ./armjed21.102 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 18 Gateway : 255.255.255.255 Host IP : 151.120.25.118 Config : eval7t.cnf The Mode LED should go off, and you can try to connect to the BDI via Telnet. [root@LINUX_1 bdisetup]# telnet 151.120.25.101 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 19: Configuration With A Windows Host

    This button is only active if there is a newer firmware or logic version pres- ent in the execution directory of the bdiGDB setup software. Press this but- ton to write the new firmware and/or logic into the BDI2000 flash memory / programmable logic. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 20: Recover Procedure

    • Switch ON the power supply for the BDI again and wait until the LED «MODE» blinks fast DEFAULT • Turn the power supply OFF again • Return the jumper to the «DEFAULT» position • Reassemble the unit as described in Appendix «Maintenance» © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 21: Testing The Bdi2000 To Host Connection

    The bdiGDB system uses TFTP to access the configuration file and to load the application program. Because there is no TFTP server bundled with Windows NT, Abatron provides a TFTP server appli- cation tftpsrv.exe. This WIN32 console application runs as normal user application (not as a system service).

  • Page 22: Using Bdigdb

    Whenever the BDI system is powered-up the following sequence starts: Power On initial configuration valid? activate BDI2000 loader Get configuration file via TFTP Power OFF Reset System and Process target init list Process GDB requests Process Telnet commands Power OFF © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 23: Configuration File

    Numeric parameters can be entered as decimal (e.g. 700) or as hexadecimal (0x80000). The core# is optional. If not present the BDI assume core #0. See also chapter "Multi-Core Support". © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 24: Part [Init]

    Write a binary image to the selected memory place. The binary image is read via TFTP from the host. Up to 4 such entries are supported. address the memory address filename the filename including the full path Example: WBIN 0x4000 pagetable.bin © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 25 CLOCK entry in the [TARGET] section. This entry maybe of in- terest to speed-up JTAG clock as soon as possible (after PLL setup). value see CLOCK parameter in [TARGET] section Example: CLOCK 2 ; switch to 8 MHz JTAG clock © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 26 Therefore it is possible first to enable some RAM with the init list before the startup code is loaded and executed. [INIT] WM32 0x0B000020 0x00000000 ;Clear Reset Map FILE d:\gdb\bdi\startup.hex FORMAT SREC START 0x100 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 27: Part [Target]

    SGOLD (enables S-GOLD ARM9 TAP during reset) time The time in milliseconds the BDI assert the reset signal. Example: RESET NONE ; no reset during startup RESET HARD 1000 ; assert RESET for 1 second © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 28 PC is set and BDI waits for GDB requests. Example: BDIMODE AGENT RUN ENDIAN format This entry defines the endiannes of the memory system. format The endiannes of the target memory: LITTLE (default) Example: ENDIAN LITTLE © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 29 DCC. If the helper code on the target executes to slow, this download mode may fail and you have to disable it. address the address of the RAM area Example: WORKSPACE 0x00000020 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 30 The number of succeeding devices irlen The sum of the length of all succeeding instruction reg- isters (IR). Example: SCANSUCC 2 12 ; two device with an IR length of 8+4 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 31 Check if ICEBreaker is accessible If (startup == reset) Set DBGRQ bit If (reset mode == hard) Release reset Wait until reset is really release Execute SCANPOST string Delay for wake-up time © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 32: Part [Host]

    TCP port number (default = 2001) Example: DEBUGPORT 2001 PROMPT string This entry defines a new Telnet prompt. The current prompt can also be changed via the Telnet interface. Example: PROMPT AT91> © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 33 If it should not send echoes and let the Telnet client in "line mode", add this entry to the configuration file. mode ECHO (default), NOECHO or LINE Example: TELNET NOECHO ; use old line mode © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 34: Part [Flash]

    FORMAT format [offset] The format of the file and an optional address offset. The optional param- eter "offset" is added to any load address read from the program file. format SREC, BIN, AOUT, ELF or COFF Example: FORMAT SREC FORMAT ELF 0x10000 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 35 The value for the CFMCLKD register used during the JTAG lockout recovery. Calculate this entry based on the reset system frequency (PLL disabled). Example: RECOVER 19 ; CLKD for 8 MHz system clock © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 36 ;select LPC2100 flash, fsys = 12.000 MHz CHIPSIZE 0x80000 ;select LPC213x/4x sector layout WORKSPACE 0x40001000 ;internal SRAM for buffer, code and stack FILE E:\cygwin\home\bdidemo\arm\mcb2130.bin FORMAT BIN 0x00000000 ERASE 0x007FFFFF BLANK ;erase sector 0...26 with blank check © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 37 ;64k internal program flash BUSWIDTH ;select 16 for this flash FILE E:\temp\aduc8k.bin FORMAT BIN 0x00080000 ERASE 0x88000 ;erase page ERASE 0x88200 ;erase page ERASE 0x88400 ;erase page ERASE 0x88600 ;erase page © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 38 EEFC_FMR is programmed with the correct value for FWS. This can be done via the initialization list. Have a look at the at91sam9xe.cfg configuration example. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 39 0x01000000 Intel 28F032B3 I28BX8 0x400000 Intel 28F640J3A STRATAX8 STRATAX16 0x800000 Intel 28F320C3 I28BX16 0x400000 AT49BV040 AT49 0x080000 AT49BV1614 AT49X8 AT49X16 0x200000 M58BW016BT M58X32 0x200000 SST39VF160 AT49X16 0x200000 Am29LV320M MIRRORX8 MIRRORX16 0x400000 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 40 The following example unlocks all 256 sectors of an Intel Strata flash ( 28F256K3) that is mapped to 0x00000000. In case there are two flash chips to get a 32bit system, double the "step" parameter. BDI> unlock 0x00000000 0x20000 256 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 41: Part [Regs]

    "addr" and then the register value is access using "data" as address. addr the address of the Address register data the address of the Data register Example: DMM1 0x04700000 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 42 0x0001 CP15 0x0002 CP15 0x0003 CP15 0x0005 CP15 0x0006 iidc CP15 0x0007 ;invalidate ID cache itlb CP15 0x0008 ;invalidate TLB itlbs CP15 0x2008 ;invalidate TLB single entry CP15 0x000d ;process identifier © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 43: Debugging With Gdb

    GDB sometimes fails to connect to the target after a reset because it tries to read an invalid stack frame. With the following init list entries you can work around this GDB startup problem: WGPR 0x00000020 ;set frame pointer to free RAM WM32 0x00000020 0x00000028 ;dummy stack frame © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 44: Breakpoint Handling

    The BDI supports the GDB V5.x "monitor" command. Telnet commands are executed and the Telnet output is returned to GDB. (gdb) target remote bdi2000:2001 Remote debugging using bdi2000:2001 0x10b2 in start () (gdb) monitor md 0 1 00000000 : 0xe59ff018 - 442503144 © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 45: Target Serial I/O Via Bdi

    Once SIO is enabled, connecting with the setup tool to update the firmware will fail. In this case either disable SIO first or disconnect the BDI from the LAN while updating the firmware. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 46: Target Dcc I/O Via Bdi

    "mrc p14,0, %0, c0, c0\n" : "=r" (ret)); return ret; void write_dcc_char(unsigned int c) { while(poll_dcc() & DCC_OUTPUT_BUSY); write_dcc(c); unsigned int read_dcc_char(void) { while(!(poll_dcc() & DCC_INPUT_READY)); return read_dcc(); void write_dcc_string(const char* s) while (*s) write_dcc_char(*s++); © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 47: Telnet Interface

    The DUMP command uses TFTP to write a binary image to a host file. Writing via TFTP on a Linux/ Unix system is only possible if the file already exists and has public write access. Use "man tftpd" to get more information about the TFTP server on your host. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 48: Command List

    IP address of program file host", "PROMPT <string> defines a new prompt string", "CONFIG display or update BDI configuration", "CONFIG <file> [<hostIP> [<bdiIP> [<gateway> [<mask>]]]]", "HELP display command list", "QUIT terminate the Telnet session" © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 49: Cp15 Registers

    The bit "i" selects the instruction cache (scan chain bit 32), the bit "x" extends access to register 6 (scan chain bit 37). In the register definition file "reg940t.def" you will find some examples. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 50 0x29 : Clean + Flush D cache entry index 0x2a : Clean D cache 0x2b : Drain Write buffer 0x37 : I cache TLB Lock-Down 0x3a : D cache TLB Lock-Down © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 51: Multi-Core Support

    #1 DCC ;DCC I/O via TCP port 7 For a complete configuration example see "eb63_eval7t.cfg" on the diskette. This configuration was used to debug an AT91EB63 daisy chained with an Evaluator-7T board. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 52: Specifications

    -20 °C ... +65 °C Relative Humidity (noncondensing) <90 %rF Size 190 x 110 x 35 mm Weight (without cables) 420 g Host Cable length (RS232) 2.5 m Specifications subject to change without notice © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 53: Environmental Notice

    GNU Debugger, BDI2000 (ARM7/9/9E) User Manual 5 Environmental notice Disposal of the equipment must be carried out at a designated disposal site. 6 Declaration of Conformity (CE) © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

  • Page 54: Abatron Warranty And Support Terms

    7 Abatron Warranty and Support Terms 7.1 Hardware ABATRON Switzerland warrants that the Hardware shall be free from defects in material and work- manship for a period of 3 years following the date of purchase when used under normal conditions.
  • Page 55 Network processes do not function (loading the firmware was successful) Possible reasons • The BDI2000 is not connected or not correctly connected to the network (LAN cable or media converter) • An incorrect IP address was entered (BDI2000 configuration) © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 56 2.2 Remove the two screws that hold the front panel TRGT MODE BDI MAIN BDI OPTION 3.1 While holding the casing, remove the front panel and the red elastig sealing casing elastic sealing front panel © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 57 5.4 Mount the two plastic caps that cover the screws 5.5 Plug the cables Observe precautions for handling (Electrostatic sensitive device) Unplug the cables before opening the cover. Use exact fuse replacement (Microfuse MSF 1.6 AF). © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...
  • Page 58 GNU Debugger, BDI2000 (ARM7/9/9E) User Manual C Trademarks All trademarks are property of their respective holders. © Copyright 1997-2011 by ABATRON AG Switzerland V 1.23...

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