2.1 Connecting the BDI1000 to Target..................4 2.1.1 Changing Target Processor Type ................. 6 2.1.2 Adaptive Clocking......................7 2.2 Connecting the BDI1000 to Power Supply................9 2.2.1 External Power Supply ....................9 2.2.2 Power Supply from Target System ................10 2.3 Status LED «MODE»......................
A RS232 interface with a maximum of 115 kBaud and a 10Base-T Ethernet interface is available for the host interface. The configuration software is used to update the firmware and to configure the BDI1000 so it works with the RDI compatible debugger.
JTAG interface for RDI Debuggers, BDI1000 User Manual 2 Installation 2.1 Connecting the BDI1000 to Target The enclosed cables to the target system are designed for the ARM Development Boards. In case where the target system has the same connector layout, the cable (14 pin or 20 pin) can be directly connected.
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This input to the BDI1000 connects to the target TDO line. The BDI1000 works also with targets which have no dedicated TRST pin. For this kind of targets, the BDI cannot force the target to debug mode immediately after reset. The target always begins execu- tion of application code until the BDI has finished programming the Debug Control Register.
User Manual 2.1.1 Changing Target Processor Type Before you can use the BDI1000 with an other target processor type (e.g. ARM <--> PPC), a new setup has to be done (see chapter 2.6 «Configuration»). During this process the target cable must be disconnected from the target system.
RTCK. When adaptive clocking is selected, BDI1000 issues a TCK signal and waits for the Returned TCK (RTCK) to come back. BDI1000 does not progress to the next TCK until RTCK is received. For more information about adaptive clocking see ARM documentation.
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This output of the BDI1000 connects to the target TCK line. TRST JTAG Test Reset This open-drain / push-pull output of the BDI1000 resets the JTAG TAP controller on the target. Default driver type is open-drain. JTAG Test Mode Select This output of the BDI1000 connects to the target TMS line.
BDI1000, keep the power supply cable as short as possible. For error-free operation, the power supply to the BDI1000 must be between 2.5V and 5V DC. The maximal tolerable supply voltage is 5.25 VDC. Any higher voltage or a wrong polarity might destroy the electronics.
2.2.2 Power Supply from Target System The BDI1000 needs to be supplied between 2.5V and 5V via TARGET A connector. This mode can only be used when the target system runs between 2.5V and 5V and the pin «Vcc Target» is able to deliver a current up to: •...
MODE LED BDI STATES The BDI is ready for use, the firmware is already loaded. The power supply for the BDI1000 is < 2.5VDC. BLINK The BDI «loader mode» is active (an invalid firmware is loaded or loading firmware is active).
JTAG interface for RDI Debuggers, BDI1000 User Manual 2.4 Connecting the BDI1000 to Host 2.4.1 Serial line communication The host is connected to the BDI through the serial interface (COM1...COM4). The communication cable between BDI and Host is a serial cable (RXD / TXD are crossed). There is the same connector pinout for the BDI and for the Host side (Refer to Figure below).
User Manual 2.4.2 Ethernet communication The BDI1000 has a built-in 10 BASE-T Ethernet interface (see figure below). Connect an UTP (Un- shilded Twisted Pair) cable to the BD1000. For thin Ethernet coaxial networks you can connect a commercially available media converter (BNC --> 10 BASE-T) between your network and the BDI1000.
JTAG interface for RDI Debuggers, BDI1000 User Manual 2.5 Installation of the Configuration Software On the enclosed diskette you will find the BDI configuration software and the firmware required for the BDI. Copy all these files to a directory on your hard disk.
First make sure that the BDI is properly connected (see Chapter 2.1 to 2.4). The BDI must be con- nected via RS232 to the Windows host. To avoid data line conflicts, the BDI1000 must be disconnected from the target system while programming the logic for an other target CPU (see Chapter 2.1.1).
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This button is only active if there is a newer firmware or logic version present in the execution directory of the BDI setup software. Press this button to write the new firmware and/or logic into the BDI1000 flash mem- ory / programmable logic.
In order to prepare the target for debugging, you can define an Initialization List. This list is stored in the Flash memory of the BDI1000 and worked through every time the target comes out of reset. Use it to get the target operational after a reset. The memory system is usually initialized through this list.
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JTAG interface for RDI Debuggers, BDI1000 User Manual Special BDI Configuration Registers: In order to change some special configuration parameters of the BDI, the GPR entry in the init list is used. Normal ARM GPR's covers a range from 0 to 15. Other GPR's are used to set BDI internal...
JTAG interface for RDI Debuggers, BDI1000 User Manual 3.1 Init CP15 Registers Via the Initialization List it is possible to setup the Coprocessor 15 (CP15) registers. The address part of a WCP15 init list entry uses a special format which depends on the used CPU type.
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JTAG interface for RDI Debuggers, BDI1000 User Manual ARM926E: The 16bit register number contains the fields of the appropriate MCR/MRC instruction that would be used to access the CP15 register. +-+-----+-+-----+-------+-------+ |-|opc_1|-|opc_2| +-+-----+-+-----+-------+-------+ Normally opc_1, opc_2 and CRm are zero and therefore you can simply enter the CP15 register num- ber.
JTAG interface for RDI Debuggers, BDI1000 User Manual 4 BDI working modes dialog box «BDI Working Mode» With this dialog box you can define how the BDI interacts with the target system. Identification Enter a text to identify this setup. This text can be read by the debugger with the appropriate Command.
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Check this switch if the target memory uses Big Endian format. JTAG Clock This option allows to select the used JTAG clock rate (adaptive needs a special cable from Abatron, please ask for it). JTAG Scan Chain The BDI can also handle systems with multiple devices connected to the JTAG scan chain.
JTAG interface for RDI Debuggers, BDI1000 User Manual 4.1 Startup Mode Startup mode defines how the BDI interacts with the target system after a reset or power up sequence. 4.1.1 Startup mode RESET In this mode no ROM is required on the target system. The necessary initialization is done by the BDI with the programmed init list.
JTAG interface for RDI Debuggers, BDI1000 User Manual 5 Working with RDI Debuggers 5.1 ADW/AXD from ARM Ltd. 5.1.1 Configuration In order work with ADW/AXD from ARM Ltd. copy the RDI interface DLL (bdirdi.dll) to the \bin subdi- rectory of your ARM Software Development Toolkit directory.
JTAG interface for RDI Debuggers, BDI1000 User Manual 5.1.2 Implementation notes Interactive input of "Direct commands" is not supported, but download to flash is possible with the appropriate command files in the working directory. The execution of the command files can be ob- served in the RDI Log window.
JTAG interface for RDI Debuggers, BDI1000 User Manual 5.2 BDI Direct Commands For special functions (mainly for flash programming) the BDI supports so called «Direct Commands». This commands can be entered in a command file (e.g. PRELOAD.CMD) or if supported directly ex- ecuted in the debugger’s Command Line Window.
JTAG interface for RDI Debuggers, BDI1000 User Manual 5.2.2 Flash.Setup In order to support loading into flash memory, the BDI needs some information about the used flash devices. Before any other flash related command can be used, this direct command must be execut- Syntax: flash.setup type=am29f size=0x80000 bus=32 workspace=0x1000...
JTAG interface for RDI Debuggers, BDI1000 User Manual 5.2.3 Flash.Erase This command allows to erase one flash sector, block or chip. Syntax: flash.erase addr=0x02800000 mode=chip addr The start address of the flash sector to erase. mode This parameter defines the erase mode. The following modes are supported: CHIP, BLOCK and SECTOR (default is sector erase) MAC7100 internal flash (CFM32, CFM16):...
JTAG interface for RDI Debuggers, BDI1000 User Manual 5.3 Download to Flash Memory The BDI supports download and debugging of code that runs out of flash memory. To automate the process of downloading to flash memory, the BDI looks for two command files in the working direc- tory.
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JTAG interface for RDI Debuggers, BDI1000 User Manual Supported Flash Memories: There are currently 3 standard flash algorithm supported. The AMD, Intel and Atmel AT49 algorithm. Almost all currently available flash memories can be programmed with one of this algorithm. The flash type selects the appropriate algorithm and gives additional information about the used flash.
JTAG interface for RDI Debuggers, BDI1000 User Manual 6 Telnet Interface A Telnet server is integrated within the BDI that can be accessed when the BDI is connected via eth- ernet to the host. It may help to invertigate problems and allows access to target resources that can not directly be accessed by the debugger.
In no event shall ABATRON be liable for any loss of profit or any other commercial damage, including but not limited to special, incidental, consequential, or other damages.
JTAG interface for RDI Debuggers, BDI1000 User Manual B Maintenance The BDI needs no special maintenance. Clean the housing with a mild detergent only. Solvents such as gasoline may damage it. If the BDI is connected correctly and it is still not responding, then the built in fuse might be damaged (in cases where the device was used with wrong supply voltage or wrong polarity).
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JTAG interface for RDI Debuggers, BDI1000 User Manual 4.1 While holding the casing, slide carefully the print in position as shown in figure below Jumper settings DEFAULT INIT MODE Fuse Position Pull-out carefully the fuse and replace it Type: Microfuse MSF 1.6AF...
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