Coprocessor Support; Instruction Decoding; Status Encoding - HP 10312D Operating Manual

Intel 80286 preprocessor for the hp 1650a and hp 16510a logic analyzers
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Coprocessor
Support
Instruction
Decoding
Status Encoding
Analyzing the Intel 80286
1-22
Physical, rather than logical addresses, are used to perform symbolic
address mapping. Most instructions, however, specify a 16-bit
intrasegment offset and may indicate a segment different from the
default segment for that particular instruction. Since the physical
address cannot be determined from this information alone, the inverse
assembler must attempt to locate the resulting bus cycle so that the
physical address may be obtained. If a bus cycle of the type indicated
by the initiating instruction is not found, the physical address cannot be
determined and an unmapped logical address (segment override, if
any, and the 16-bit intrasegment offset)
is
displayed instead of a
mapped physical address.
The HP 10312D Interface Module fully supports the 80287
coprocessor. The 80287 instructions are inverse assembled and all
80287 operand transfers are decoded as I/O reads and writes.
The HP 10312D Interface Module will send all bus transactions by both
the microprocessor and coprocessor to the logic analyzer, and the time
count will accurately reflect when the bus cycles occurred. No
distinction
is
made between instructions that are executed and those
that are only prefetched by the microprocessor. Typically, there will be
several states separating the memory (or 1/0) transfer from the
instruction that caused the transfer. The logic analyzer
is
clocked on
the falling edge of the microprocessor input clock. This occurs at the
end of the next bus state following the last Tc state. The next bus state
could be a Ts or a Ti state.
Each of the eight bits in the STATUS label are described below. Table
1-1 lists the precise value of each bit for all types of 80286
microprocessor cycles. Bit 0
is
the least significant bit of the 8-bit field.
Bit 0
is
the device status bit LSl.
Bit 1
is
the device status bit BHE.
Bit 2 is the device address bit AO.
Bit 3
is
the device status bit LSO.
Bit 4
is
the device status bit M/LIO.
Bit 5
is
the device status bit COD/LINTA.
Bit 6
is
the device status bit LLOCK.
Bit 7
is
the device status bit HLDA.

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